Real Temp - New temp program for Intel Core processors

[rge]

Intel just deleted my post again, this time in a matter of hours. Just dont get why they would delete it. Refusing to answer, sure.

KTE, I accept any error from measuring "Tcase" at surface versus 380 microns deep as very small, whether right or wrong, primarily because no heatsink is in place. No question with a heatsink, it would be necessary to place the thermocouple below the surface. And actually we have no interest in measuring tcase anyways, so I guess we should say we are measuring the casing of the cpu, at idle, UC/UV steady state with no cooling solution on, as the casing/core are near equilibrium at that point, ie within ~0-2C.

But I completely agree the main issue boils down to the gradient between tcase and tjunction at idle, and the one I have the least info on is across TIM1. No one has proof but intel, however you can find some evidence in several different ways.

Mathematically, you can guestimate it using known values with other tested materials in intel papers, especially the one I quoted when I made my "assertive question" to intel. (Which they have now deleted again.)

There were two experiments that indirectly measured it (neither by intel) across TIM1 and IHS. One was talked about in a discussion on overclock.com, someone named bill and? and they stated the gradient was 2.5C across that of P4, and they stated "we all agree on that", these were individuals that design heatsinks for a living, but they offered no proof. But they vigorously argued about everything but the 2.5C gradient. And TIM1 from that time til now has increased in conductance ~10x, and a slide show by intel development team has stated decrease in resistance, have to find the slide presentation, (Edit..found slide presentation...slides 35-39, http://download.intel.com/technology...Packaging.pdf). The 10x is from looking up those that sell TIM1 for cpus and comparing their thermal conductance, to those mentioned in previous studies, not only from older P4, but even much higher than the slides mentioned above in 2005.

Also, it was kinda measured at idle, in paper below, though this compares measuring casing temps underneath, though intel has stated 2/3 heat travels via TIM1 to this point, and 1/3 directly to casing below...so not direct analogy, but they found only 0.4C gradient at idle. http://www.overclockers.com/tips443

Other evidence is just from reading a lot of papers, and them saying things like 20-30% gradient across tim1, because although thermal conductance is higher for tim1, tim1 is only ~75-100um thick, and lower thickness directly lowers thermal resistance....again just mathematical guestimate.

So my best guess, using all info, is that gradient is 0-2C, under low power, UC/UV idle, but my question was to intel because as you state, only they know for sure. But given all I have read, I have a hard time believing at those conditions it is much higher, especially when no heatsink is applied to drive the gradient.