**Official e8400/e8500 Retail OC Thread

[.OCX]

3 Hour Screenshot
2 Hour Screenshot

400 STRAP
[BIOS SETTING]

Ratio CMOS Setting : 9
FSB Frequency : 444
FSB Strap to North Bridge : 400
PCI-E Frequency: 100
DRAM Frequency: DDR2-1186
DRAM Command Rate : 2T
DRAM Timing Control: Manual 
5-5-5-15
DRAM Static Read Control: DISABLED
Ai Clock Twister : STRONG
Transaction Booster : ENABLED
Boost: 0
Performance Level: 7

CPU Voltage : 1.28125v
CPU PLL Voltage : 1.5v*
North Bridge Voltage :1.59v 
DRAM Voltage : 2.34v
FSB Termination Voltage :  1.20v*
South Bridge Voltage : 1.05v*
Loadline Calibration : ENABLED
CPU GTL Reference : .61
North Bridge GTL Reference : .63
DDR2 Channel A REF Voltage : DDR2
DDR2 Channel B REF Voltage : DDR2
DDR2 Controller REF Voltage : DDR2
SB 1.5V Voltage : 1.5v*

*Lowest Bios Setting Available in 0907

-Added High CFM Fan directly to DRAM.
-Changed DDR2 Channel A & B REF Voltage to "DDR2"
-This increased the DRAM REF Voltage in Hardware Monitor from (Auto@1.184v) to (DDR2@1.23v)
-DRAM installed in White Slots to get around DETDRAM issues when Overclocking, helps overall DRAM Stability.
-Limited on 400 Strap due to RAM

-1.28125v VCORE is the Exact Same Setting I use for my 333 Strap Stable@ddr2-1068 that is also currently in use for this 400Strap Stable@ddr2-1186.