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Thread: Real Temp - New temp program for Intel Core processors

  1. #2126
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    A new version of CoreTemp , the 0.99.3 is gone out .

    link : http://www.alcpu.com/CoreTemp/

    And you know what ? Finally , it give me the same température as REALTEMP .

    So , it is never too late to do a good job !
    Last edited by jeanjean15; 08-24-2008 at 11:37 AM.

  2. #2127
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    Bah core temp is using 100 TJMAX and the newest Realtemp is using 100 TJMAX on 65nm .. but i still state after many ppl testing that 95C TJMAX is the 65nm Q6600 proper temps.

    Now Unclewebb even you did your own testing and concluded that 95C TJMAX was for the Q6600's, now i know Intel never gave us the info we wanted at that stupid meeting they had recently, but test again and again as it is closer to 95C then 100C TJMAX.

    Were only taking 4-5C difference, but that can make or break a CPU.... lol
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  3. #2128
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    Quote Originally Posted by BeastNotro View Post
    Bah core temp is using 100 TJMAX and the newest Realtemp is using 100 TJMAX on 65nm .. but i still state after many ppl testing that 95C TJMAX is the 65nm Q6600 proper temps.
    All the testing showed 95C at IHS when tjmax was reached, but that is not die temps. We guessed at die temps, by guessing the gradient from die to IHS using intel docs and testing to be 1-2C max, thus within measurement error to assume tjmax to be 95. While 10C gradient (tjmax 105) would conflict with intels docs and testing, 5C is plausible.

    But intel is now basically telling us that an E8400 has 5C gradient from IHS (95C) to die tjmax (100), how do you explain no such 5C gradient on Q6600 GO or any other cpu that measure 95C at IHS, if 95 tjmax is used?

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    For the E8400, Intel seems to be saying that TjMax is 5C hotter than the measurement I'm doing on the IHS. I think that is probably a couple of degrees high but Intel has spoken and given us a number so we have to all agree with that. This sounds dumb but finally having the correct TjMax does not necessarily mean that we have more accurate temperatures than before. More testing needs to be done to compare Intel's version of things with what an IR gun shows. My estimate of TjMax may have been resulting in reported core temperatures that were a couple of degrees too low and Intel's version might be giving us temps that are a couple of degrees too high. At least we're getting much closer to agreement and Intel admitting that these sensors can have significant slope error when you get far away from TjMax also confirms one of the main items behind RealTemp.

    If Intel is assuming the E8400 is TjMax=100C then the Q6600 G0 and other late 65nm processors all have to be assumed as TjMax=100C because they were all measuring the same as the E8400. Same thing applies here. TjMax=95C will probably give you a degree or two too low and TjMax=100C will be a couple of degrees too high.

    More testing will be posted this week so users can decide what version of the truth to believe. I can't use TjMax=95C as the default for the E8400 without Intel telling the world at the next IDF that I'm wrong. The beast has spoken and RealTemp is trying to get in line. TjMax will always be adjustable for users that see things differently than Intel does.

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    Exclamation

    Unc,

    Why am I not surprised? Intel's agenda was so typically "corporate", and was designed by engineering management to tell us only what the legal department approved. Please don't be discouraged by Intel's disclosures, which were sorely lacking, since they chose to ingnore the 65 nanometer community. I think the entire farce raised more questions than it answered.

    We know Intel admits Tjunction Max has factory variations that deviate from part to part and core to core, which is why we all see different core temperatures on identical hardware platforms at the same ambient temperature, and different core temperatures on the same processor.

    This means that if a Tjunction Max specification is 100c for a given variant, some cores could be 96c while others could be over 100c. Obviously Tjunction Max specifications are not 100% accurate, and as such, should be regarded as an approximation which always has a + / - calibration factor.

    I have difficulty in accepting Intel's specifications at face value, because it doesn't follow the extensive data that's been presented in this thread. Therefore, I still believe your original findings were very accurate. However, I thought that it would've been prudent at the outset to include the calculated 1c gradient between Tcase and your IHS measurement, which in turn would've corrected your findings by + 1c, making Tjunction Max 96c.

    Additionally, consider the following; since the calibration method I developed for SpeedFan in my Core 2 Quad and Duo Temperature Guide does not use Tjunction Max values, then why, when I calibrate the Q6600 G0 on my personal rig, do the results show that it has an average Tjunction Max value of 98c? Why, when others have performed my calibrations, do their core temperatures also fall between 95c and 100c? It just doesn't make sense that you could've been off by more than a degree or two.

    In light of Intel's stated Tjunction Max values, I think it would be sensible to extract and review some of the most revealing key posts in this thread, such as those from rge and a few others, so as to provide a well grounded basis for further discussion. Regardless, we're down to an accuracy of a few degrees.

    Keep up the great work, unc. I'm always in your corner!

    Comp
    Last edited by CompuTronix; 08-24-2008 at 03:20 PM.

  6. #2131
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    Does this progam support new E0 stepping on Wolfdales?
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  7. #2132
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    Quote Originally Posted by CompuTronix View Post
    Unc,

    This means that if a Tjunction Max specification is 100c for a given variant, some cores could be 96c while others could be over 100c. Obviously Tjunction Max specifications are not 100% accurate, and as such, should be regarded as an approximation which always has a + / - calibration factor.

    I have difficulty in accepting Intel's specifications at face value, because it doesn't follow the extensive data that's been presented in this thread. Therefore, I still believe your original findings were very accurate. However, I thought that it would've been prudent at the outset to include the calculated 1c gradient between Tcase and your IHS measurement, which in turn would've corrected your findings by + 1c, making Tjunction Max 96c.

    Comp
    Unclewebb had pm'ed me, we were thinking the same. Tjmax is likely 100 on 65nm, since intel would almost assuredly use same logic and same rounded? 5C difference on 65nm as they do on 45nm. But that certainly does not mean absolute temp on all cpus are 100C at tjmax of "100". We were thinking of secretly setting ours to 97

    But, that 3C difference will probably be least problem, given intels admission of a constant widening error the further from tjmax you go. Also, it would be confusing to the masses to fight intel over 3C, especially by agreeing tjmax is 100 but that 100 is high approximation of slightly lower temp...unless we can get ?MRI temp map on a cpu. Maybe unclewebb could use tjmax of 100, and hide the 3C in the correction factor up to tjmax

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    rge,

    Considering the variables involved, 97c seems plausible. I've come up with the same value more often than not, based upon my own research, testing and observations.
    Last edited by CompuTronix; 08-24-2008 at 08:59 PM.

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    95-97C is ok, but 100 nope.
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  10. #2135
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    Quote Originally Posted by BeastNotro View Post
    95-97C is ok, but 100 nope.
    Absolute temps, I agree. But if tjmax is set different than 100, the questions will be neverending and intel and everyone else will likely be calling Real temp wrong if they release 65nm tjmaxes.

    If Unclewebb uses a correction factor (extends calibration) to correct for the widening error from tjmax on, no reason not to put the 3C correction in that. Then could use 100 tjmax as intel does, but with correct temps. And if intel wanted to call that wrong, they would have to prove it with much more information than they gave last time.

  11. #2136
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    I see Intel's info turn out to be less info than expected. But I really wonder how do they really determine that tjmax is 100 for 45nm.

  12. #2137
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    Quote Originally Posted by anzial View Post
    Does this progam support new E0 stepping on Wolfdales?
    The latest beta, RealTemp 2.75, should work fine with your E0.

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    what's the advantages of this software versus coretemp? thank you


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    Quote Originally Posted by jarthel View Post
    what's the advantages of this software versus coretemp? thank you
    From what I understand, reading through this post is it seems the CPU sensor is like a mercury thermometer without a scale. To calibrate a mercury thermometer it is put in boiling water. For the CPU sensor, Intel inform us that for a E8400 the point that the cpu shuts down is called tjmax and that value is 100C ( + or - 5C ?)

    To complete the calibration of a mercury thermometer it is put in ice water. Apparently there is no equivalent reference point for the CPU.

    So it seems most programs assume a linear decrease of sensor voltage with temperature from tjmax. I believe Unclewebb does not make this assumption and uses a calibration curve that is based on actual measurements so RealTemp is potentially more accurate than programs such as Coretemp.

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    I know we had all brought this up before at one time or another, but I am thinking all cpus have a roughly 26-30C difference between Tcase max and Tjmax, see the knowns below. Only one cpu unclewebb tested deviated from that, and that cpu came in both 60 and 70 range tcasemax, and I am thinking the factory worker that day said, oh ****, what stepping was that today? It would make sense for the gradients to be constant, in fact it would not make sense for them not to be.

    Also you can see intel is clearly rounding tjmax numbers, compare those to actual tcase max. Intel does not care about absolute tjmax, but tcase they calculate to tenth decimal.

    Processor--power(W)--Tcase max--Casing IR(idle)--Tjmax----absolute temps at tjmax (+/- few C according to intel)
    E7x00-------65---------74------------------------------100
    E8x00-------65---------72.4-----------95--------------100
    Q9650-------95---------71.4---------------------------100
    Q9000-------95---------71-----------------------------100
    QX9650----130---------64.5----------------------------95
    QX9770----136---------55.5----------------------------85

    Q6600 GO--95----------71-------------95-------------100?
    Q6600 B3 -105---------62.2-----------85--------------90?
    E6850------65----------72-------------95-------------100?
    E6700------65----------60.1-----------85?-------------90?
    E6600------65----------60.1-----------85--------------90?

    QX6800 GO-130--------64.5-----------90?-------------95?
    (compare to QX9650 with known tjmax)

    QX6800 B3-130--------54.8-----------80?-------------85?
    (compare to QX9770)

    E4400 L2--65-----------61.4----------85---------------90?
    E4400 M0-65-----------73------IRx1 85 ? intel employee thinking it was L2 stepping day, or fluke?

    And the formula from intel, suggests there is a constant gradient from tjmax to tcase, as now strongly suggested by same tjmax on both E8x00 and E7x00 despite one solder attach, the other adhesive attach and by quads proven to have same gradient tjmax to tcasemax as duo's, and the slight variance in absolute temps at tjmax intel just rounds out.
    Attached Thumbnails Attached Thumbnails Click image for larger version. 

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    Last edited by rge; 09-19-2008 at 03:36 PM.

  16. #2141
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    I like your thinking rge
    It stands to reason that there would be a correlation between Tcase and TjMax.

    Unclewebb
    2.75 rocks
    This screenshot was taken after heavy stresstesting on IntelBurnTest 1.5.1
    Now, the idle temps are more or less the same (which is good), but also the load temps are all within 5C of each other.
    I am not quite sure how Reltemp is reporting a minimum of 19C on one core though



    2.75 is definitely an improvement over previous versions with my Extreme Sensors

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  17. #2142
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    JohnZS nice temps dude

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  18. #2143
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    JohnZS: that minimum might have been recorded if you were changing calibration factors just before starting your test or it might just be another random number from your bizarre sensors. Thanks to Intel, I now have someone / something to blame no matter what RealTemp says. It's the crappy sensors!

    what's the advantages of this software versus coretemp?
    Now that all programs should be using the same TjMax for 45nm, there shouldn't be that much of a difference for most processors. The only big advantage that RealTemp has is that it lets you individually calibrate each sensor. CoreTemp is useless for processors like the one JohnZS has. CoreTemp offers no adjustability so it will report his center two cores 15C different from each other even though their temperature is almost exactly the same. CoreTemp will also report my E8400 too hot at idle.

    Page 8 of the Intel presentation at IDF shows you that the slope error these sensors have can grow to be a significant amount at low temperatures. So far, RealTemp is the only program that gives you a way to try and correct for this. It's not perfect but it's better than nothing.
    Last edited by unclewebb; 08-25-2008 at 09:30 AM.

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    UncleWeb,

    Now that we are assuming an ~5*C gradient at load should we also assume that at idle? Instead of calibrating so that idle temps are 4-5*C above ambient for dual-core (and 6-7*C for quad) should we be using different assumed values to calibrate?
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    UncleWeb, I've been using Real Temp ever since I discovered the program here on this forum. Thanks for a good job. What do you recommend setting the Tjmax on the Q9450? At the moment I have it set to 95.
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    Quote Originally Posted by jason4207 View Post
    UncleWeb,

    ,Now that we are assuming an ~5*C gradient at load should we also assume that at idle? Instead of calibrating so that idle temps are 4-5*C above ambient for dual-core (and 6-7*C for quad) should we be using different assumed values to calibrate?
    I have not put this pic up before but i just sent to unclewebb. It is testing of a pentium northwood which has a higher gradient than 65nm (65nm has more copper bands in silicon die and better die attach, etc). But it illustrates the point of idle vs load. It is from yang et al, who has done some testing for intel as well.

    Ignore the solid grey top lines, it is software estimating the die temp of a pentium northwood by estimating power usage/leakage, and then converting to temps.

    The red scribble is mine.
    -Ambient at idle = bottom red arrow (bottom broken line).
    -Thermocouple in IHS at idle = middle red arrow (middle broken line labeled spreader by authors, temp was double checked with FLIR for accuracy).
    -CPU diode between cores at idle = the top red arrow (top broken line labeled On-die by authors)
    -There is no DTS sensor. The solid grey lines above diode is software guessing hot spot temps mathematically. At idle DTS same temp as cpu diode (confirmed on 65nm intel testing at idle, there is no offset between those at idle)

    At idle (blowing up bitmap with ruler)
    -IHS is 3.5-4C higher than ambient.
    -The cpu diode (and DTS if had one) is 3C higher than IHS (compare this with intels 5C gradient IHS to tjmax).
    -So the cpu diode (and the DTS on die) are 6-7C higher than ambient, at stock clock, stock volts, with stock heatsink. (But northwood is hot cpu, less copper bands on die, less conductivity, worse die attach. But power density is higher on 45nm so, again left to guess for 45/65, but that gives you a ballpark.)

    At load
    -5-7C difference between IHS (spreader) and cpu diode (on die), and that is constant on load for most programs.
    -There is no DTS sensor, each grey solid line are software guessing hotspots in different die locations.. DTLB, L1, etc, you can see the varying temp gradients. (But intel did actual die sensor measurements on 65nm, and found lower gradients, but also 65nm would have lower gradients because of improvements and increased copper bands.

    So at idle with EIST/speedstep enabled, or undervolted, I would still be using 5-7C above ambient for stock cooling. For different cooling computronix had a pretty good formula that worked for mine. On water I calibrated my cpu diode 3C above water temp, which came to 3C above IR reading at DTS=0, at idle, underclocked...close enough.
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    Last edited by rge; 08-26-2008 at 04:46 AM.

  22. #2147
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    Quote Originally Posted by rge View Post
    I have not put this pic up before but i just sent to unclewebb. It is testing of a pentium northwood which has a higher gradient than 65nm (65nm has more copper bands in silicon die and better die attach, etc). But it illustrates the point of idle vs load. It is from yang et al, who has done some testing for intel as well.

    Ignore the solid grey top lines, it is software estimating the die temp of a pentium northwood by estimating power usage/leakage, and then converting to temps.

    The red scribble is mine.
    -Ambient at idle = bottom red arrow (bottom broken line).
    -Thermocouple in IHS at idle = middle red arrow (middle broken line labeled spreader by authors, temp was double checked with FLIR for accuracy).
    -CPU diode between cores at idle = the top red arrow (top broken line labeled On-die by authors)
    -There is no DTS sensor. The solid grey lines above diode is software guessing hot spot temps mathematically. At idle DTS same temp as cpu diode (confirmed on 65nm intel testing at idle, there is no offset between those at idle)

    At idle (blowing up bitmap with ruler)
    -IHS is 3.5-4C higher than ambient.
    -The cpu diode (and DTS if had one) is 3C higher than IHS (compare this with intels 5C gradient IHS to tjmax).
    -So the cpu diode (and the DTS on die) are 6-7C higher than ambient, at stock clock, stock volts, with stock heatsink. (But northwood is hot cpu, less copper bands on die, less conductivity, worse die attach. But power density is higher on 45nm so, again left to guess for 45/65, but that gives you a ballpark.)

    At load
    -5-7C difference between IHS (spreader) and cpu diode (on die), and that is constant on load for most programs.
    -There is no DTS sensor, each grey solid line are software guessing hotspots in different die locations.. DTLB, L1, etc, you can see the varying temp gradients. (But intel did actual die sensor measurements on 65nm, and found lower gradients, but also 65nm would have lower gradients because of improvements and increased copper bands.

    So at idle with EIST/speedstep enabled, or undervolted, I would still be using 5-7C above ambient for stock cooling. For different cooling computronix had a pretty good formula that worked for mine. On water I calibrated my cpu diode 3C above water temp, which came to 3C above IR reading at DTS=0, at idle, underclocked...close enough.
    Good info, but I'm still left guessing as to how (exactly) I should calibrate my CPU.

    Right now on my 45nm Quad I have my cores adjusted to 5*C above ambient while idle at 200x6=1.2GHz 1.05v on an U120E w/ a 110CFM Panaflo at 100% in 25*C ambient. I had to bring 1 core up, and the other 3 down.

    I also ran it at load at this speed and at idle/load 464x8.5=3.944GHz 1.208v and made minor adjustments to help my temps track better throughout the range.

    Anyway, I think I'm close enough, but if anyone has any suggestions on how I can be more accurate I'm all ears.
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  23. #2148
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    My original picks for TjMax for RealTemp are partly based on what this chart shows.



    http://download.intel.com/technology...ol10_art03.pdf

    This graph is from a simulation of a 65nm Core processor but the data was correlated with actual testing and found to be accurate enough.

    Depending on what application you're running, the difference between the Tj junction temperature and the diode based case temperature will range from 0C to 5C. There were a lot of applications tested where the difference was zero. I believe that when I was doing my testing with the processor 99% idle that the difference between these two temps would be at the lower end of this range between 0C and 1C.

    With 45nm, the gradients have only decreased because everything is closer together. When you run Prime small FFTs on one core, the second core in a Dual Core will heat up to within one degree of the first core even when it is at zero load.

    An assumption that Intel might be making is that if your processor is near TjMax then you must be running a high stress app and the difference between your case temperature and your hottest core temperature is probably about 5C. That assumption may not be valid when I am testing with the processor at idle.

    I plan to do some more testing when I get the chance.

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    My Temperature Guide over at Tom's is also based on the same information. Even though my calibration procedure uses SpeedFan to approach the problem from the bottom up, (ambient / Tcase idle / Tjunction load), without using Tjunction Max values, users still find that their resulting core temperatures are consistently within a degree or two on the high side of Real Temp.

    I've collected a considerable amount of data over the past year and a half on many variants by observing the relationships between Tcase and Tjunction under a variety of settings and load conditions. I think that a 5c gradient between Tcase and Tjunction is valid at stock clock and Vcore at load. Considering the number of Intel documents that we've both studied, this particular chart, which appears in two separate papers, offers some of the most revealing information.

    If we're both wrong, it can't be by much.
    Last edited by CompuTronix; 08-27-2008 at 11:16 AM.

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    I think we all agree that best evidence (both papers) suggests the only gradient at idle is across IHS, and IHS gradient is 3C for pentium northwood and likely less on 45/65nm...which means absolute temps are likely 1-2C more than 95 and 2-3C lower than 100 tjmax intel uses.

    Would be interesting to see any testing that could shed some light on why the tjmax of 100, is intel rounding up, assuming worst case scenario over time, using loading gradient assumption is an interesting idea, etc. But may be harder to discern couple degrees, much easier disproving 105 where difference was larger.

    Wonder if intel thought that releasing the tjmax's would stop the testing, I think only accurate sensors will do that

    Edit:
    We know there is 5C max gradient at stock settings between cpu diode and DTS diode on 65nm, and was about 6-7C diff on my OC E6850.

    I just spent an hour making sure I calibrated both Realtemp die temp and speedfan cpu temp both exactly 2C above IHS at idle, undervolted 1.05 and 6x200mhz...at 85C IHS both Realtemp and Speedfan cpu temp read 87C, at 90 both 92. Since there was half step (?half degree) between two, I set it so core jumped to 92 first then cpu temp, as opposed to vice versa. tjmax was 97, no surprise there. I ran temp up and down about 10 times from 70 to 95C, to make sure I had it right on the money. My DTS seems linear from 70 to 95, either that or on the same curve as IR gun and cpu diode.

    Then ran orthos and linpack with my fans off, so DTS temps would get into more accurate range. So now getting 3C higher core temp than cpu diode with linpack on OCed E8400 versus 7C with Oced E6850 (orthos) when I had that calibrated many months ago. (I get 4C difference E8400 with orthos, but that is because die temps are at 58 and reading 1C too high.)

    Maybe there is a few degrees less gradient in 45nm vs 65nm as Unclewebb testing core to core suggests, ...unfortunately I cant double check my E6850 since I killed it removing IHS while back.

    I think I am going to stick with tjmax 97...makes more sense absolute temp wise, until someone shows me different.
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    Last edited by rge; 08-26-2008 at 06:01 PM.

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