coldbug

[KTE]

hmmm that thread is huge... mind pointing out a particular site to me, dont really want to read through the past 20 pages that came up after i last read it

It's a funny thread.

Basically most chips with a CB and "some" which don't have one to -30C, extremely rare something goes beneath that. Now if they'd just bought any off the shelf and said "no CB" then I might have thought that as valid, but cherry picking one out of 1000s for no CB to sub -5C isn't exactly any good at showing CPU SKUs without a CB.

I mean this, this, this, this and all these in green are mainly close to or subzero (depending on which temp sensor you look at).

I'm sure guys there like fredyama went through tons of chips to find one without CB to get those MHz/cooling and even still, it was only the QX sorta FX chips or one or two odd Opties and X2. At 65nm G2, 5000+ BE seems to love cold to -20-15C IHS region though.

Problem with those A64/AM2s was, they were sensitive to heat/voltage and thus could scale better under water/DICE than air usually. That doesn't look like Phenom since 1.2V gets you the same as 1.7V while temps are kept sub40C i.e. design/process/material problems. nFET leakage and performance is the hardest to enhance in CPUs, C2/Penryn chips are very improved and best in this department mainly and yet K10 is 40% worse than C2 in this leakage/perf alone. This'll decide MHz/volt/heat/power level to a major level as well as the current you can feed through the chips (K10 limited to 110A total cores/20AIMC).

kte, so you think it does have to do with the mfg process after all?

Can never be sure, but that's what the signs around now show. SOI.

I mean, my K10 sensors stopped working since I tried for a CB. -14/15C IHS was fine but it read 0C on all cores (tcase) and 14C hottest internal (tjunction).



Since then all my cores are stuck at 0C now but the main one I need (tjunction) still reads right. However, even at those temps it made no difference to oc, so no point. If CB existed because of a thermal protection circuitry monitoring these sensors values within the cores, they'd have shut down my system the minute I drop temps on it.

[Aussie FX]

Can never be sure, but that's what the signs around now show. SOI.

If SOI is broken, why can Power hit 5ghz with seemingly no problems?

I've got no idea why AMD are having process issues but if IBM can get SOI to 5+ghz then it seems to me that isn't the problem.
Although I can't recall if IBM are using high K.

[chew*]

dino i kinda disproved the high htt theory on manta......350 x 4 multi.......and 300 x 5 multi..........

[dinos22]

dino i kinda disproved the high htt theory on manta......350 x 4 multi.......and 300 x 5 multi..........

BH chips were known not to coldbug at all chew*
you know that S7 did a lot of work on this and could not cold bug those sons of es even at -95C or whatever the temp was again

[chew*]

I know, remember I started the thread on them but if we compare a BH chip not known to coldbug to a non BH chip............I bet saaya could figure it out....

[KTE]

If SOI is broken, why can Power hit 5ghz with seemingly no problems?

I've got no idea why AMD are having process issues but if IBM can get SOI to 5+ghz then it seems to me that isn't the problem.
Although I can't recall if IBM are using high K.

IDK about that chips design and material selection because I haven't studied it, never needed to, so I can't speak for that and each IC is very different despite it using the same design process. However SOI isn't broken in itself, but it does have material and implementational limitations with the current properties of the chemicals used in K10. They can enhance these properties and get far lower current leakage in the "on" and "off" states, higher drive current and better transistor performance throughout, which will give you better MHz at lower power/temps/volts idle and load. One of these methods is to employ a relatively thin high-k dialectric/metal gate CMOS which is exactly what they've been working on with IBM and for the above specified reason.

There's a two things:
a) a design/material frequency and current limit
b) something which causes coldbugs

The first you can't address, only AMD can.
The second you maybe can address.. if you knew what it was. (hence the thread)

And yeah saaya, what you said is true. As it gets colder, there is much less resistance and more voltage actually gets to the cores, which also affects current leakage as it decreases drastically and more is then provided to the cores. There is a massive difference with the amount of current leakage in cold/hot temps, like 40x at 50C compared to 0C, if not more.