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Thread: AMD issues STOP SHIP order on Barcelona

  1. #1
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    AMD issues STOP SHIP order on Barcelona

    Wow. They are in big trouble.

    No significant quantities of B3 Barcs expected until end of Q1.

    10-20% perf hit with "fix" to B2. Impacts lower speeds.

    Seems to me that AMD should be publicly *recalling* all K10 parts, including Phenom.

    Intel is going to take virtually all of their server share over the next few months.

    ---------------

    http://techreport.com/discussions.x/13721

    Chip problem limits supply of quad-core Opterons
    by Scott Wasson — 1:49 PM on December 3, 2007

    AMD's quad-core "Barcelona" Opterons have been notably difficult to find since their introduction two months ago, and The Tech Report has learned that a chip-level problem has impacted the supply of these chips to both server OEMs and distribution channel customers.

    Chipmakers refer to chip-level problems as errata. Errata are fairly common in microprocessors, though they vary in nature and severity. This particular erratum first became widely known when AMD attributed the delay of the 2.4GHz version of its Phenom desktop processor to the problem. Not much is known about the specifics of the erratum, but it is related to the translation lookaside buffer (TLB) in the processor's L3 cache. The erratum can cause a system hang with certain software workloads. The issue occurs very rarely, and thus was not caught by AMD's usual qualification testing.

    An industry source at a tier-two reseller told The Tech Report that the TLB erratum has led to a "stop ship" order on all Barcelona Opterons. When asked for comment, spokesman Phil Hughes said AMD is shipping Barcelona Opterons now, but only for "specific customer deals." Industry sources have suggested to TR that those deals are high-volume situations involving supercomputing clusters. Such customers may run workloads less likely to be affected by any workarounds for the erratum that reduce L3 cache performance, and those customers could potentially consume hundreds of thousands of CPUs. Our sources indicate, and the current availability picture would seem to confirm, that quad-core Opterons are not shipping to OEMs or the channel more generally.

    News of this problem is notable because it confirms that the TLB erratum affects Barcelona server processors as well as Phenom desktop CPUs, and that the problem impacts AMD's quad-core processors at lower clock speeds. AMD's initial public statements about the erratum and the delay of the 2.4GHz Phenom seemed to imply that the issue was closely related to clock frequencies. The Opteron 2300 lineup spans clock speeds from 1.7GHz to 2.0GHz. Those CPUs' north bridge clocks, which determine the frequency of the L3 cache, range from 1.4GHz to 1.8GHz.

    The erratum is present in all AMD quad-core processors up to the current B2 revision. AMD has said a revision B3 is in the works and expected in Q1. One source told TR that large quantities of B3 chips might not be available until the end of Q1.


    The potential for instability with the TLB erratum can be corrected via BIOS-based workaround, but multiple sources have suggested the BIOS fix involves a substantial performance hit. AMD has publicly estimated the performance penalty for the BIOS fix could be around 10%, and one source pegged the penalty at 10-20%. AMD has acknowledged that the TLB erratum particularly affects virtualization, and industry sources say the performance hit from the fix may be most severe with virtualization, as well. Server administrators responsible for virtualized environments will probably want to wait for the B3-rev CPUs before upgrading.

    TR has attempted to confirm the impact of the BIOS-based fix, but the BIOS for the SuperMicro H8DMU+ motherboard used in our review of the Barcelona Opterons has not been updated since mid-September and doesn't appear to include the TLB erratum workaround.

    Linux users may have another option in the form of a patch for that operating system's kernel. Sources estimate this patch's performance hit at less than one percent, but it comes with several caveats. At present, the patch purportedly only applies to the 64-bit version Red Hat Enterprise Linux, Upgrade 4. Customers must sign a non-disclosure agreement in order to obtain the patch, and will be responsible for supporting it themselves. The patch doesn't currently appear to be available via Red Hat's regular support channels.

    At present, Microsoft doesn't offer a Windows hotfix to address the problem, and our sources were doubtful about the prospects for such a patch. CPU makers have oftentimes addressed errata via updates to the processor's microcode, but such a fix for this problem also appears to be unlikely.

  2. #2
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    It was only a matter of time. I kind of expected this would happen when they announced problems with the core last week. This is just too bad for AMD, they trully shot themselves in the foot. It will take atleast 2 years for AMD to even come back to be slightly competative, let alone the leader in cpu industry.

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    Yeah, I too figured that the TLB thing had to hit Barc as well. But what is interesting here is that it appears lower-speed Phenoms *are* affected by the problem, too.

    I feel sorry for anyone who bought one. They should be allowed to return it for a refund, and wait for B3 silicon, if they will want it.

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    hopefully this will get intel to not use the imc on the nahilem
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    Quote Originally Posted by zanzabar View Post
    hopefully this will get intel to not use the imc on the nahilem
    Unlike AMD, Intel has the immense R&D and raw capital to put up in order to implement an IMC correctly.

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    Quote Originally Posted by terrace215 View Post
    Intel is going to take virtually all of their server share over the next few months.
    Is this official news or your personal opinion

    And if anyone is glad this happened I have a $200 P3 to sell you
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    hmmm

    Using a TLB hasn't got to do with the internal memory controller. It's something Intel already has, as does any CPU with alot of sophisticated cache mechanisms. It's purpose is to streamline fetching from memory, regardless of where or how that memory is set up.
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    So with B3 it should be about same performance as Core 2 clock for clock. Only cuz of this fix that has a huge performance hit on B2 stepping, they have to lower the price on K10 and they can't really higher the price when B3 arrives either. That seems quite embarrassing to me. Guess they will try to price it a bit expensier than it's worth compared to Core 2 CPUs meanwhile.
    Last edited by RPGWiZaRD; 12-03-2007 at 01:56 PM.
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    Haven't heard good news from AMD in a long time... seems like they just keep throwing gas on the fire that has started on thier reputation.

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    I guess I will be one of few who have retail K10 Bracelona 2346s for a while.

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    At least they bought ATI. They can float the company in these times.

    I also think releasing barcelona was a bad idea. There have been problems reported for months.
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    This is seriously bad news. And here I was hoping for a Phenom at tax time...

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    all I really want is for fusion to kick ass. F' Barcelona.

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    AFAICT the TLB bug doesn't diminish performance on current low clocked parts , the fix applied does that.In other words , K10 won't increase IPC over what the 2.2/2.3GHz parts tested have shown.

    Either way , why isn't there a public recall ? Imagine AMD's partners who were given faulty silicon.
    Last edited by savantu; 12-03-2007 at 02:26 PM.
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    Quote Originally Posted by xlink View Post
    all I really want is for fusion to kick ass. F' Barcelona.
    Fusion is a low-end part, at least initially. Why are you so excited about getting cheap integrated graphics on die with your CPU?

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    AMD in big trouble (...)
    Here we go again...
    You were not supposed to see this.

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    Quote Originally Posted by RPGWiZaRD View Post
    So with B3 it should be about same performance as Core 2 clock for clock. Only cuz of this fix that has a huge performance hit on B2 stepping, they have to lower the price on K10 and they can't really higher the price when B3 arrives either. That seems quite embarrassing to me. Guess they will try to price it a bit expensier than it's worth compared to Core 2 CPUs meanwhile.
    thats not the way i understood it. the way i understood it is they have this problem and COULD fix it with a bios correction but it would THEN bring the 10-20% performance hit and it may or may not work. but i may have read the article wrong.

    but either way this is bad news for AMD like being totally off the market until the end of Q1? thats BAD, you think they would have found this problem out before they released a major product
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    AMD hits bottom, and then starts digging. I hope they can tread the water.
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    Quote Originally Posted by xlink View Post
    all I really want is for fusion to kick ass. F' Barcelona.
    Wait, don't you mean Bulldozer? Fusion is going to be more for laptops, handhelds, and other things, no?


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    Quote Originally Posted by largon View Post
    Here we go again...
    maybe they would sell more with this one
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    Quote Originally Posted by ColonelCain View Post
    Wait, don't you mean Bulldozer? Fusion is going to be more for laptops, handhelds, and other things, no?
    same diference

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    I still aint willing to call it some doomsday, but I really need some good news to keep my faith ...
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    ColonelCain,

    AFAIK,
    Fusion = next gen CPU basic architecture (just like "Hammer" for K8)

    2 different cores in Fusion family:
    Bulldozer = next gen all-purpose CPU core module
    Bobcat = next gen mobile CPU core module with on-die PCIe2.0, iGPU on an MCM

    Bulldozer core modules are for desktop, servers & HPC:
    Falcon = next gen desktop CPU (Bulldozer(s) + iGPU on an MCM)
    Sandtiger = next gen server & HPC CPU (lots of parallel Bulldozer cores, no iGPU)
    Last edited by largon; 12-03-2007 at 02:56 PM.
    You were not supposed to see this.

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    AMD get it together

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    Quote Originally Posted by RPGWiZaRD View Post
    So with B3 it should be about same performance as Core 2 clock for clock. Only cuz of this fix that has a huge performance hit on B2 stepping, they have to lower the price on K10 and they can't really higher the price when B3 arrives either. That seems quite embarrassing to me. Guess they will try to price it a bit expensier than it's worth compared to Core 2 CPUs meanwhile.
    Let's hope B3 offers way better performance
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