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Thread: Pinmod for Merom ?

  1. #1
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    Pinmod for Merom ?

    did someone already tried it ?
    if yes, how

    I'm willing to try it, if there's a detailed howto...


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  2. #2
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    what shall the Pinmod do?

    higher(lower) FSB or Vcore?

    CB

  3. #3
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    Nothing difficult, find merom spec sheet and do something like this
    ...

  4. #4
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    I want that FSB mod, trying to overcome the fsb limit on those Merom's.

    that spec sheet can be found where ?

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  5. #5
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    no, doesnt work.

    When 800FSB chipset comes, you should be able to take a 667fsb and pin-mod it... we'll see
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  6. #6
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    so, there isn't a pinmod for 266 fsb ?
    it looks like a Dothan B1 problem ?

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  7. #7
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    - You can make a FSB pinmod if the chipset allows it. The 945GT runs at 533 or 667 MHz, so you simply can't do much about it. A CM 400 can get some extra speed though since it runs at 533 MHz.

    - It looks like we can forget about running 667 MHz CD's in 800 MHz laptops. The upcoming 800 MHz CPU's uses socket P.
    The initial batch of 65nm Merom processors, part of the Core 2 Duo family, will run on a 667MHz front side bus. The second batch will use an 800MHz front side bus and another new socket design: Socket P

  8. #8
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    Quote Originally Posted by Mats
    - You can make a FSB pinmod if the chipset allows it. The 945GT runs at 533 or 667 MHz, so you simply can't do much about it. A CM 400 can get some extra speed though since it runs at 533 MHz.

    - It looks like we can forget about running 667 MHz CD's in 800 MHz laptops. The upcoming 800 MHz CPU's uses socket P.

    I am pretty sure that they will have the new santa rosa platform use 667mhz FSB CPU's.

    Sorta like on Sonoma, you could use dothan 7x0 and 7x5 series processors.


    Take a 667mhz FSB socket P CPU and then pin mod that

    So 166--) 200

    Easily take a 2.0ghz merom to 2.4ghz!
    Or, take a 2.16ghz merom to 2.6ghz

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  9. #9
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    Quote Originally Posted by irev210
    Take a 667mhz FSB socket P CPU and then pin mod that

    So 166--) 200

    Easily take a 2.0ghz merom to 2.4ghz!
    Or, take a 2.16ghz merom to 2.6ghz

    Yep, and the PCI-E/S-ATA/Integrated sound won't be ed up because the motherboard frequencies will still be default. THAT'S good for overclocking laptops.

  10. #10
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    Quote Originally Posted by irev210
    I am pretty sure that they will have the new santa rosa platform use 667mhz FSB CPU's.

    Sorta like on Sonoma, you could use dothan 7x0 and 7x5 series processors.


    Take a 667mhz FSB socket P CPU and then pin mod that

    So 166--) 200

    Easily take a 2.0ghz merom to 2.4ghz!
    Or, take a 2.16ghz merom to 2.6ghz

    That's exactly what I was thinking the first time I read about 800 MHz Merom. Now I realize it's just wishful thinking. There will probably be 667 MHz CPU's for Santa Rosa, but my guess is that they're CM's only.

  11. #11
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    IS there anywhere a Pin Mod to go arround the FSB Wall on Yonah?

  12. #12
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    I tried to pinmod Merom on my laptop to get 200 FSB out of it...but as the 945PM doesn't officially support that FSB, it would not work.

    You could probably pinmod Merom on a desktop board with a chipset that supports 200MHz+ operation, but most of them already have overclocking/jumpering options to allow manual selection of the 200 MHz strap anyway.
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  13. #13
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    sorry for bumping this old thread but i am planning to buy a notebook in teh next few days

    can i pin mod the T2250 ( 1.73Ghz @ fsb 533 ) to bus 667 ???
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  14. #14
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    Quote Originally Posted by SaFrOuT
    sorry for bumping this old thread but i am planning to buy a notebook in teh next few days

    can i pin mod the T2250 ( 1.73Ghz @ fsb 533 ) to bus 667 ???
    I have a T2050 and have been searching the net, no luck, there must be a way?
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    Quote Originally Posted by deltarealm
    I have a T2050 and have been searching the net, no luck, there must be a way?
    Of course. Check out this document, on page 25 you see how the different BSEL pins works, and on page 50 you see the locations.
    Last edited by Mats; 11-07-2006 at 03:27 AM.

  16. #16
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    well i can't understand the BSEL stuff that much

    but i concluded from a big search that there is now way to do it
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  17. #17
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    It's not impossible just because nobody have described on the internet yet, or because you don't understand how it works. What is it that you don't understand? It isn't more complicated than with the PM.
    Remember how long time it took before we saw guides with pictures of how to do it with PM's? People used the corresponding documents for PM to find out how to do it.

  18. #18
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    casue of both

    i don't understand the BSEL stuff and how to compare it to the Yonah's and after asking on several forums specially notebookreview.com's forum the only answer i got that it is not possible
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  19. #19
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    It looks like BSEL1 should be isolated, breaking it off is one method...
    Code:
    BSEL2  BSEL1  BSEL0  PD  P4   CD
      L      L      L    266 r    r
      L      L      H    r   133  133
      L      H      H    r   r    166
      L      H      L    200 200  r
      H      H      L    r   r    r
      H      H      H    r   r    r
      H      L      H    r   r    r
      H      L      L    r   r    r
    
    r=reserved

  20. #20
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    Quote Originally Posted by Mats
    It looks like BSEL1 should be isolated, breaking it off is one method...
    What are the other methods without having to break something?
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  21. #21
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    Quote Originally Posted by deltarealm
    What are the other methods without having to break something?
    I don't know actually. Maybe using some kind of insulating paint on the pin, or tape on the corresponding socket connector under the socket lid. I think it's very difficult since there's little space between the pins. It seemed possible on a S462 I just looked at, but they're not that small.

    This is a situation when LGA 775 is much better than PGA 478, with LGA you don't have to break a pin.

  22. #22
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    *quickly stuffs my necromancer's hat and garb away* OKAY! Sorry about that.

    Looking through here; and at the BSEL chart, i'm assuming H means contact, and L means none, yes? So, to enable 166 on a 133 CPU (what i want to do to an Inspiron 6400), BSEL 2 must not be active, while BSEL 0/1 need to be?

  23. #23
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    not sure if it's the same with merom, but when I tried pinmodding a yonah, it locked me to the 6x multiplier

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  24. #24
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    Sorry to dig up a dead thread, but I put together a pic from the intel datasheets for socket M/P pinmodding. Haven't tried it yet; anyone willing to give it a shot?

    EDIT: I did not make a pic for voltage modding: it's generally undesirable.
    VID is determined by the formula:
    1.500V - VID0*0.0125 - VID1*0.025 - VID2*0.05 - VID3*0.1 - VID4*0.2 - VID5*0.4 - VID6*0.8

    If we set any of them, we'll throw out half of the voltage possibilities. This is demonstrated by a voltage selection range with "holes" where the VID change is masked by the pinmod. For mobile CPUs we like to have full VID control since battery life suffers without it; most XSers will not be messing with anything less significant than VID4. But that also limits our modding range by whatever VIDx's multiplier is.

    For example: to get a better overclock, we'll take a 1.2375V CPU and set VID4 to zero. Now we'll have up to 1.4375V to play with, but we lose all voltage settings between 1.3000V and 1.1125V (inclusive) [as well as others that we can't set at runtime]. We won't be able to choose VIDs optimally for the multipliers between maximum and minimum anymore; this will have a negative impact on battery life. Also, I'm pretty sure Deeper Sleep and C4E both use even lower VIDs, hence the range of VIDs from 1.5V to 0V. If the VID for either of these idle states is affected by the modified VIDs, (for the case of overvolting) battery life will suffer considerably, or (for the case of undervolting) the CPU may crash as it tries to enter an "apparent VID" that is too low.

    EDIT: Added VID spreadsheet.

    I looked into the 6x multiplier issue. I suspect the Intel *chipsets* are responsible for the "anti-overclocking protection" (http://www.freepatentsonline.com/6535988.html): one person who has pin modded their yonah/merom successfully without the 6x multiplier lock used an AMD/ATI 200M chipset, not an intel chipset. To overcome this lock, the reference clock for the chipset will probably have to be replaced, or overclocking must be done after booting the operating system (ie. Clockgen or SetFSB fashion). The second option is probably not as bad as it sounds. Since Santa Rosa platforms have Dynamic FSB Frequency Switching, the FSB clock generator on the motherboards should be safely programmable on-the-fly and independent of the PCI/PCIe buses. The only problem, then, is writing the software to interface to the clock generator.

    Continuing edit:
    Edited VID spreadsheet again; wasn't clear how to use it correctly. Linked from CPU Rightmark folks.

    According to http://www.meisterkuehler.de/forum/e...tml#post283750 , connecting VID to ground kills CPUs. New spreadsheet for VID-VID 'dynamic' pinmods. Warning: incomplete.
    Attached Thumbnails Attached Thumbnails Click image for larger version. 

Name:	pinmod socket M_P.png 
Views:	3345 
Size:	129.0 KB 
ID:	68445  
    Attached Files Attached Files
    Last edited by evilr00t; 02-24-2008 at 03:14 PM. Reason: add VID spreadsheet, expand discussion on VIDs, discuss 6x multiplier issue

  25. #25
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    Quote Originally Posted by evilr00t View Post
    Sorry to dig up a dead thread, but I put together a pic from the intel datasheets for socket M/P pinmodding. Haven't tried it yet; anyone willing to give it a shot?

    EDIT: I did not make a pic for voltage modding: it's generally undesirable.
    VID is determined by the formula:
    1.500V - VID0*0.0125 - VID1*0.025 - VID2*0.05 - VID3*0.1 - VID4*0.2 - VID5*0.4 - VID6*0.8

    If we set any of them, we'll throw out half of the voltage possibilities. This is demonstrated by a voltage selection range with "holes" where the VID change is masked by the pinmod. For mobile CPUs we like to have full VID control since battery life suffers without it; most XSers will not be messing with anything less significant than VID4. But that also limits our modding range by whatever VIDx's multiplier is.

    For example: to get a better overclock, we'll take a 1.2375V CPU and set VID4 to zero. Now we'll have up to 1.4375V to play with, but we lose all voltage settings between 1.3000V and 1.1125V (inclusive) [as well as others that we can't set at runtime]. We won't be able to choose VIDs optimally for the multipliers between maximum and minimum anymore; this will have a negative impact on battery life. Also, I'm pretty sure Deeper Sleep and C4E both use even lower VIDs, hence the range of VIDs from 1.5V to 0V. If the VID for either of these idle states is affected by the modified VIDs, (for the case of overvolting) battery life will suffer considerably, or (for the case of undervolting) the CPU may crash as it tries to enter an "apparent VID" that is too low.

    EDIT: Added VID spreadsheet.

    I looked into the 6x multiplier issue. I suspect the Intel *chipsets* are responsible for the "anti-overclocking protection" (http://www.freepatentsonline.com/6535988.html): one person who has pin modded their yonah/merom successfully without the 6x multiplier lock used an AMD/ATI 200M chipset, not an intel chipset. To overcome this lock, the reference clock for the chipset will probably have to be replaced, or overclocking must be done after booting the operating system (ie. Clockgen or SetFSB fashion). The second option is probably not as bad as it sounds. Since Santa Rosa platforms have Dynamic FSB Frequency Switching, the FSB clock generator on the motherboards should be safely programmable on-the-fly and independent of the PCI/PCIe buses. The only problem, then, is writing the software to interface to the clock generator.

    Continuing edit:
    Edited VID spreadsheet again; wasn't clear how to use it correctly. Linked from CPU Rightmark folks.

    According to http://www.meisterkuehler.de/forum/e...tml#post283750 , connecting VID to ground kills CPUs. New spreadsheet for VID-VID 'dynamic' pinmods. Warning: incomplete.
    nice job in the screan so, i have one problems... the pins "BSEL[0], BSEL[2], VSS" is where page? left, right, up, down? help me!!
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