No, it's not an engineering sample. Rather, it's a pre-release sample. The ss was done one phase change. PCICe was able to hit 3.8G with this cpu on his cascadeOriginally Posted by sobol
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No, it's not an engineering sample. Rather, it's a pre-release sample. The ss was done one phase change. PCICe was able to hit 3.8G with this cpu on his cascadeOriginally Posted by sobol
![]()
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