I865/I875 tweaker (beta version)

[|-jokker-|]

Great tool man , thank you a lot .
More controls would be divine

[pokipoki]

Excellent tool, it has made quite a few people happy Thank you
ctiaw seems to capture the new settings applied by the Tweaker

FYI : i875P Tweaker Findings

For my setup, Active to Precharge (tRAS) Max and Refresh Mode Select (RMS) values other
than the default seems to make system slower (that's just me).
You may want to determine the fastest settings (for these 2 parameters) at stock speed first.

The following pics are found from the i875P Datasheet that relates to the parameters in the Tweaker.



1. CL TIMINGS (11 = Reserved)




2. REFRESH MODE SELECT (RMS) (111 = Fast Refresh Mode)




3. DRAM LATENCY PARAMETER (** not sure about these, best match I found **)
111 = Normal Operation, although reported to be fastest previously




Also, 3DMark2001 seems to be able to measure performance changes in CL timings better as reported by Hipro5 here

Regards,
pokipoki

[pokipoki]

@cpulloverclock

I notice this list is a bit long Please implement at your convenience, your efforts are much appreciated. Thank you.

1. PERFORMANCE REQUIREMENT BIT (PRB MSR_PLATFORM_BRV bits [18])
This feature allows P4 Prescott (LGA775 & Socket478) to step down multiplier to the lowest in its class (x14 for Prescott). Tom's Hardware article
I have found a document that indicates this feature (PRB) applies to Xeons as well.
IA-32 Intel® Architecture Software Developer's Manual, Volume 3: System Programming Guide PDF page 750 or B-16




2. CPU MULTIPLIER ADJUSTMENT FOR XEONS (IA-32_FLEX_BRVID_SEL MSR bits [15:8])
By default, highest operating multiplier is set and used for the CPU. It can be adjusted as described by the document below, but I am unable to find the address of the MSR, BIOS programmers will have this info. I believe the tweak can be applied to both Nocona (FSB 800MHz) & Prestonia (FSB 533MHz) Xeons.
Intel(R) Xeon(TM) Processor with 800 MHz System Bus Datasheet PDF page 14



3. i875P CHIPSET TWEAKING
Intel® 875P Chipset: Intel® 82875P Memory Controller Hub (MCH) Datasheet PDF

MSR/HEX/Bits values are found in the following pages

pg 17 i875P Block Diagram
pg 19 & 135 AGP 2.0 High Priority Access
pg 22 i875P Interface Block Diagram
pg 36 & 72 IOQ Depth
pg 51 & 82 Revision Identification Register (Device 0/Device 1)
pg 56 CSA Basic Control register (Device 0)
pg 63 SMRAM & TSEG
pg 70 TOUD - Top of Used DRAM
pg 71 - 72 MCH Configuration Register (Device 0)
pg 114 DRAM Timing Register (Device 6, MMR)
pg 115 DRAM Controller Mode Register (Device 6, MMR)
pg 128 Dynamic Addressing Multiplexing Mode
pg 129 Memory Operating Modes & Dynamic Adressing Modes
pg 134 & 140 Memory Thermal Management
pg 136 AGP [4X] [8X]

Request Tweaker Functions
i875P Revision/Stepping Information
CSA [Enable] [Disable]
AGP [4X] [8X]
AGP FastWrite [Enable] [Disable]
AGP 32-deep Request Queue [Enable] [Disable]
AGP 2.0 High Priority Access [Enable] [Disable] [Status]
AGP/PCI/PCI-X lock
IOQ Depth [1] [12]
Measurement/Adjustment of NB to SB throughput (Hub Interface)
Multiplier adjustment of P4 ES models & Xeon Processors
Measurement/Adjustment Chipset VID
DRAM Frequency [DDR466] [DDR500] [DDR533] [DDR550] [DDR600]
CPU/Memory ratio [6:5] [5:4] [4:5] [4:3] [3:4] [3:2]
BSEL BootStrap : [100MHz] [133MHz] [166MHz] [200MHz] [266MHz] (for socket 478/604/775 : BSEL info will be supplied when requested)
PRB Bit : [Enable] [Disable]
PAT [Enable] [Disable] for all memory modules configuration (1 or 2 pair)
Hyper-Threading [Enable] [Disable]
System Memory Controller Opportunistic Refresh [Enable] [Disable] [Status]
PCI Bus Mastering [Enable] [Disable] [Status]
Spread Spectrum [Enable] [Disable] [Status]
Memory Thermal Management [Enable] [Disable] [Status]
TSEG [Enable] [Disable] [Status]
TSEG Size [Enable] [Disable] [Status]
High SMRAM [Enable] [Disable] [Status]

*Intel Reserved Bit-Values can also be explored

OFF-TOPIC

LGA775 BOOTSTRAP FSB U-WIRE MOD (if it's even possible)

Intel® Pentium® 4 Processor 560, 550, 540, 530 and 520 Datasheet PDF

Intel® Pentium® 4 Processor 3.60F GHz, 3.40F GHz, 3.20F GHz on 90 nm Process in
775-land LGA Package & supporting EM64T PDF
(this PDF have Intel Secret stamps on some pages, it's not available on the Datasheet webpage yet)

FSB 266MHz or 1066MHz is in here, higher bus-speed is possible


page 21 : LGA775 : BSEL 0/1/2 PIN SIGNAL CONFIGURATION


page 42 : LGA775 : Landout diagram : TOP VIEW (LEFT SIDE)

Best Regards,
pokipoki

[cpulloverclock]

New version here : http://www.cpuid.org/download/Tw865.zip

- some bugs corrected
- a performance mode parameter available
- U can save with the Tw865.exe -file=save.txt command

[b|gf|sh]

Great app there cpulloverclock/franck

I tested changing Abit's Game Accelerator settings on my IS7 to see if any of the settings in your app changed: -

'Game Accelerator' -> Changes 'Performance Mode' (as expected) (Auto = Disabled, Turbo+SR+F1 = Enabled)
'Refresh Cycle Time' -> Changes Nothing
'Read Delay (tRD)' -> Changes Nothing
'Read Delay Adjust (tRDA)' -> Changes 'DRAM Latency Parameter' (Disabled = 00, Enabled = 10)
'CPC' -> Changes Nothing

So, if tRD and CPC (and whatever 'Refresh Cycle Time' changes) options could be added in a future release that would be well appreciated.

[amisha]

can someone please explaine to me what this programe does ?

[deltarealm]

Place the program in the startup folder, loads automatically, but...

I need to know how to make it set the DRAM Latency Parameter to 01 automatically, then exit.

So I don't have to do this manually everytime I reboot. This 01 setting fixes graphical glitchs on the i865 chipset.

Help please, I will be very thankful.

I have been using a Hex Editor on the program, I was able to change the 00 to 01, but it had no effect. Seem that I can only edit the text within the program.

The SAVE button function does not work, it only outputs a txt file. I don't understand this.