https://www.techpowerup.com/245572/a...e-in-m-2-slots

ASMedia is giving finishing touches to the ASM2824 PCI-Express gen 3.0 x24 switch. With half the fabric as the PLX PEX8747, the chip takes in PCI-Express 3.0 x8, and puts out four PCI-Express 3.0 x4 connections. In theory, this would let a motherboard designer create four M.2 PCIe 3.0 x4 slots from 8 downstream PCIe lanes of the Intel Z390 chipset, saving the remaining PCIe lanes for onboard USB 3.1 controllers (preferably sourced from ASMedia itself), since Intel canned the older 14 nm version of the Z390, which was supposed to put out six 10 Gbps USB 3.1 gen 2 and ten 5 Gbps USB 3.1 gen 1 ports directly from the PCH.

With all four downstream slots populated, ASMedia promises NVMe RAID bandwidths of up to 6,500 MB/s, with some CDM numbers even crossing 6,700 MB/s. Then again, one has to take into account that the test platform probably had the ASM2824 wired to the CPU's PCIe root-complex, and not that of the chipset. Intel is yet to modernize the lousy DMI 3.0 chipset-bus between its latest processors and chipset, and is physically PCI-Express 3.0 x4, which is fundamentally outdated for the bandwidth-heavy interfaces of this generation, such as USB 3.1, M.2 NVMe, and even the upcoming SD Express. The ASM2824 is also a godsend for the AMD AM4 platform, which not only has the same PCI-Express 3.0 x4 chipset bus between the AM4 SoC and the X470 chipset, but also a poor downstream PCIe feature-set of the X470, with just 8 gen 2.0 lanes. Motherboard designers can wire out all of those lanes to an ASM2824 for up to 24 downstream lanes.