Quote Originally Posted by Raja@ASUS View Post
Means the IMC is probably topping out with the DRAM timings you are using. Use looser DRAM timings. Start off with Latency Boundary set to 14 and work down. If you get "55" at Latency Boundary 14 the IMC is tapped, though you might get around it with CAS, tRCD and VDIMM.
Shouldn't known stable P67/Z68 timings be similar to Z77?

Latency Boundry is all ready at 14, I got it to work by loading the loose PSC profile and keying in the tighter primary timings I was looking for, and viola boot, I think it has to do with auto setting secondary or tertiary timings a bit to tight when loading the preset memory profiles.

however I did have to loosen my timings on PSC to 7-11-7-27-1T to get them to boot/bench stable.

6-9-6-20 on BBSE is not happening and unfortunately no hypers to test on this platform with sb cpu atm, but not expecting miracles.