Some DFI LP B/Athlon XP-M FSB luving...

**tictac** · 07-15-2004, 04:33 AM

SAE from that screen shot

is it from left to right = top to bottom of DFI bios

or from right to left = top to botton DFI bios

i'm quite confused now....

**SAE** · 07-15-2004, 10:07 AM

Originally posted by tictac
SAE from that screen shot

is it from left to right = top to bottom of DFI bios

or from right to left = top to botton DFI bios

i'm quite confused now....

**Rabbi_NZ** · 07-15-2004, 11:55 AM

my Alpha settings on the NF7 are the same as in your pic SAE

... do you run those timings all the time?

**SAE** · 07-15-2004, 12:48 PM

Originally posted by Rabbi_NZ
my Alpha settings on the NF7 are the same as in your pic SAE ... do you run those timings all the time?

Yep, at the moment... but the screenie is taken from my internet rig with the nf7-s and one of tictac's d23 bioses

**SAE** · 07-15-2004, 03:04 PM

Hehe. Just completed a Superpi 32M. Have a look...

**SAE** · 07-15-2004, 03:29 PM

A lil linky for the last bench before I go to bed

http://service.futuremark.com/compare?2k1=7975282

At only 2924MHz

265.86MHz FSB!!!

**SAE** · 07-16-2004, 02:44 AM

Next one with new CPU

**mrlobber** · 07-16-2004, 02:53 AM

Originally posted by SAE
Next one with new CPU

Another 2600+ Mobile?

Might want to buy the old one from you if it did reasonably on air...

**SAE** · 07-16-2004, 03:20 AM

Originally posted by mrlobber
Another 2600+ Mobile?

Might want to buy the old one from you if it did reasonably on air...

Hehe... I dunno nothing, but nearly nothing about its performance on air... a friend already said he'd be interested too. He also is on air cooling. Hmm.

Yeah, the new one is an RPMW 0352 2600+

**tictac** · 07-16-2004, 05:04 AM

Originally posted by SAE

SAE.. here... do u know the address for Side Band Addressing?

Code:

					****************************
					* nVidia nForce2 Data Base *
					****************************


1) AGP Latency
  *************
	PCI Bus#2 Dev#0 Func#0 Offset#0D
	
		      0D
	- 16  clock : 10
	- 32  clock : 20
	- 64  clock : 40
	- 96  clock : 60
	- 128 clock : 80
	- 160 clock : A0
	- 192 clock : C0
	- 224 clock : E0
	- 255 clock : FF
		
2) PCI Latency
  *************
	PCI Bus#0 Dev#8 Func#0 Offset#1B
	
		      1B	
	- 16  clock : 10
	- 32  clock : 20
	- 64  clock : 40
	- 96  clock : 60
	- 128 clock : 80
	- 160 clock : A0
	- 192 clock : C0
	- 224 clock : E0
	- 255 clock : FF
	
	
3) CPU Disconnect Function
  *************************
	PCI Bus#0 Dev#0 Func#0 Offset#6C,6D,6E,6F
	
		    6C 6D 6E 6F
	- Enable  : 01 FF 01 1F/9F
	- Disable : 01 FF 01 8F
	
	
4) Command Per Clock (T1/T2)
  *******************
  	PCI Bus#0 Dev#0 Func#1 Offset#84,85,86,87
	
		    84 85 86 87
	- Enable  : F3 13 0F 03 
	- Disable : F3 13 0F 23 
	
	WARNING! (Not Editable after boot, Can only be set before memory sizing)
	
	
5) Alpha Memory Setting
  **********************
	PCI Bus#0 Dev#0 Func#1 Offset#94,95,96,97
	
		    94 95 96 97
	- T(DOE)  :	     x	Selectable Value: 0,1,2,3,4,5,6
	- T(RRD)  :           x Selectable Value: 0,1,2,3,4,5,6
	- T(W2P)  :       x	Selectable Value: 0,1,2,3,4,5,6
	- T(W2R)  :        x	Selectable Value: 0,1,2,3,4,5,6
	- T(REXT) :    x	Selectable Value: 0,1,2,3
	- T(R2P)  :     x	Selectable Value: 0,1,2,3,4,5,6
	- T(R2W)  : x 		Selectable Value: 0,1,2,3,4,5,6
	- reserved:  -		Selectable Value: -
	
	- Offset 94 = XY
		X= T(R2W)	Selectable Value: 0,1,2,3,4,5,6
		Y= Reserved	-
		
	- Offset 95 = XY
		X= T(REXT)	Selectable Value: 0,1,2,3,
		Y= T(R2P)	Selectable Value: 0,1,2,3,4,5,6
		
	- Offset 96 = XY
		X= T(W2P)	Selectable Value: 0,1,2,3,4,5,6
		Y= T(W2R)	Selectable Value: 0,1,2,3,4,5,6
		
	- Offset 97 = XY
		X= T(DOE)	Selectable Value: 0,1,2,3,4,5,6
		Y= T(RRD)	Selectable Value: 0,1,2,3,4,5,6

6) Normal Memory Setting
  ***********************
  	PCI Bus# Dev# Func# Offset#
  	
  	
  	- T(RAS)	:
  	- T(RCD-Read)	:
  	- T(RCD-Write)	:
  	- T(RP)		:
  	- CAS Latency	:
  	- T(RC)		:
  	- T(RFC)	:

**SAE** · 07-16-2004, 05:18 AM

Originally posted by tictac
SAE.. here... do u know the address for Side Band Addressing?

Code:

**************************** * nVidia nForce2 Data Base * **************************** 1) AGP Latency ************* PCI Bus#2 Dev#0 Func#0 Offset#0D 0D - 16 clock : 10 - 32 clock : 20 - 64 clock : 40 - 96 clock : 60 - 128 clock : 80 - 160 clock : A0 - 192 clock : C0 - 224 clock : E0 - 255 clock : FF 2) PCI Latency ************* PCI Bus#0 Dev#8 Func#0 Offset#1B 1B - 16 clock : 10 - 32 clock : 20 - 64 clock : 40 - 96 clock : 60 - 128 clock : 80 - 160 clock : A0 - 192 clock : C0 - 224 clock : E0 - 255 clock : FF 3) CPU Disconnect Function ************************* PCI Bus#0 Dev#0 Func#0 Offset#6C,6D,6E,6F 6C 6D 6E 6F - Enable : 01 FF 01 1F/9F - Disable : 01 FF 01 8F 4) Command Per Clock (T1/T2) ******************* PCI Bus#0 Dev#0 Func#1 Offset#84,85,86,87 84 85 86 87 - Enable : F3 13 0F 03 - Disable : F3 13 0F 23 WARNING! (Not Editable after boot, Can only be set before memory sizing) 5) Alpha Memory Setting ********************** PCI Bus#0 Dev#0 Func#1 Offset#94,95,96,97 94 95 96 97 - T(DOE) : x Selectable Value: 0,1,2,3,4,5,6 - T(RRD) : x Selectable Value: 0,1,2,3,4,5,6 - T(W2P) : x Selectable Value: 0,1,2,3,4,5,6 - T(W2R) : x Selectable Value: 0,1,2,3,4,5,6 - T(REXT) : x Selectable Value: 0,1,2,3 - T(R2P) : x Selectable Value: 0,1,2,3,4,5,6 - T(R2W) : x Selectable Value: 0,1,2,3,4,5,6 - reserved: - Selectable Value: - - Offset 94 = XY X= T(R2W) Selectable Value: 0,1,2,3,4,5,6 Y= Reserved - - Offset 95 = XY X= T(REXT) Selectable Value: 0,1,2,3, Y= T(R2P) Selectable Value: 0,1,2,3,4,5,6 - Offset 96 = XY X= T(W2P) Selectable Value: 0,1,2,3,4,5,6 Y= T(W2R) Selectable Value: 0,1,2,3,4,5,6 - Offset 97 = XY X= T(DOE) Selectable Value: 0,1,2,3,4,5,6 Y= T(RRD) Selectable Value: 0,1,2,3,4,5,6 6) Normal Memory Setting *********************** PCI Bus# Dev# Func# Offset# - T(RAS) : - T(RCD-Read) : - T(RCD-Write) : - T(RP) : - CAS Latency : - T(RC) : - T(RFC) :

Wow, Tictac, great info there! :thumbsup:

It's PCI Bus#0 Dev#0 Func#0 Offset#49
...set it to 01 to disable, 03 to enable

**SAE** · 07-16-2004, 05:20 AM

**SAE** · 07-16-2004, 05:24 AM

Ahh, and the last one

**tictac** · 07-16-2004, 05:31 AM

grrrrr... 3.2GHz

is that Pentium 4?

congrats.... keep pushin bro...

**SAE** · 07-16-2004, 05:42 AM

Originally posted by tictac
grrrrr... 3.2GHz

is that Pentium 4?

congrats.... keep pushin bro...

No Pee4

Hehe, but as fast as one

Did you see the setting for SBA?

It's PCI Bus#0 Dev#0 Func#0 Offset#49
...set it to 01 to disable, 03 to enable

**tictac** · 07-16-2004, 05:53 AM

Originally posted by SAE
No Pee4

Hehe, but as fast as one

Did you see the setting for SBA?

It's PCI Bus#0 Dev#0 Func#0 Offset#49
...set it to 01 to disable, 03 to enable

ok got it... thanx

**shmaa** · 07-16-2004, 06:06 AM

little off topic but...

SAE, how did you get CPUZ to detect your chip as a mobile AMD athlon? The frist screen shot in this thread has it as the usual unknown cpu type, but your recent ones have it detecting.

**SAE** · 07-16-2004, 06:26 AM

Originally posted by shmaa
little off topic but...

SAE, how did you get CPUZ to detect your chip as a mobile AMD athlon? The frist screen shot in this thread has it as the usual unknown cpu type, but your recent ones have it detecting.

The bios has to recognize it

(1st screen: 2-17 alpha, later 5-5 21T6 AdvModDev Edition

)

Thx again AdvModDev

http://service.futuremark.com/compare?2k1=7976575

No new record, but nice

**mongoled** · 07-16-2004, 09:26 AM

duuuuude..

u have to stop right now, its not fair, lol

U cant be posting stuff like this right now, u gonna cause a riot, heehee.

Man u really pushing the boundries, total respect to what youve done, you putting us all to shame.

One of the true overclockerz

On a side note, I found out how system limited 3d01 is! Even with the card in sig, only nature showed any meaningful improvement!

No way for challenging for top spot with this platform on warm water, lol.

mong

**SAE** · 07-16-2004, 12:14 PM

Originally posted by mongoled
duuuuude..

u have to stop right now, its not fair, lol

U cant be posting stuff like this right now, u gonna cause a riot, heehee.

Man u really pushing the boundries, total respect to what youve done, you putting us all to shame.

One of the true overclockerz

On a side note, I found out how system limited 3d01 is! Even with the card in sig, only nature showed any meaningful improvement!

No way for challenging for top spot with this platform on warm water, lol.

mong

Thanks mong, buddy

I think there's more to come

I did some 3dmarking, but have not been able to break my record yet... two time the same score

25349

At 12x266 and 12x267

R9800pro is limiting me

**dippyskoodlez** · 07-16-2004, 05:56 PM

Originally posted by SAE
Hehe... I dunno nothing, but nearly nothing about its performance on air... a friend already said he'd be interested too. He also is on air cooling. Hmm.

Yeah, the new one is an RPMW 0352 2600+

ALRIGHT!!

I just got me a 2600+M IQYHA 0352 RPMW from the egg

DFI has my infinity thanks to a crooked socket, right now.. cant wait to get her back....

Been seeing nothing but excellent results with this chip!

Oh, and that 3.1ghz on 1.96Vcore...

That is VERY NICE!

Does the extreme temps help the OC at such a low voltage? Cuz my SLK is jsut aching now that I saw that one. I figured it was over 2.15Vcore!

**SAE** · 07-16-2004, 11:58 PM

Hehe, the chip can do 3.13G stable with 2V set in bios

(261Fsb)

**dippyskoodlez** · 07-17-2004, 06:22 AM

Originally posted by SAE
Hehe, the chip can do 3.13G stable with 2V set in bios (261Fsb)

I gotta get me a mach II

**Dojo | Warlord** · 07-17-2004, 08:45 AM

Nice FSB there, 268 is nasty.

**mrlobber** · 07-17-2004, 09:43 AM

Originally posted by SAE
I think there's more to come

I did some 3dmarking, but have not been able to break my record yet... two time the same score 25349 At 12x266 and 12x267 R9800pro is limiting me

Not an original idea at all: get a GF6800 or Radeon X800...

Thread: Some DFI LP B/Athlon XP-M FSB luving...

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