Quote Originally Posted by Aten-Ra View Post
Core 1
2x128b AVX or 2x128b un-recompiled SSE
or
128-bit FP command

Only one legacy 128-bit FP FMAC per Thread
Solus Corvus already corrected you(after I did even before that). You need to read that blog post again.The whole point of co-processor model is that one core can have the whole FPU(2xFMAC) in case of second core having no fp instructions scheduled.Yes ,even in legacy code and that's the beauty of AMD's approach.

As for the benchmarks from chiphell,this is what Charlie said at SA:
Quote Originally Posted by charlie
Ax steppings had serious problems. B0 might have too, but that was supposed to fix many. If it is pre-B1, I would not count on it to be a reliable benchmark.

-Charlie