Pipeline is longer (as expected for a higher clockable design). This is also a reason for the cache latencies.
1 cycle lower FMA/FMUL/FADD latency is good for FP performance.
But the fast mode, mul latencies and even a 4 cycle latency for such a small L1 cache could be signs of some new clocking modes. If I find out more about that I'll surely post it![]()





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But yeah, it's an unfair comparison. On the other hand, it's good to see the differences between different platforms. 
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