I measured again and got 15% difference this time.
It can't be the other way around, the difference is too small for that.
Thuban @4 GHz + Big Typhoon VX
Windows 3.1 starts on Phenom II X6 4GHz | Форум СЦБиcтов - Railway Automation Forum
WHo says it's a 4 module/8 core part? I'd say it's two modules/four cores (one on the left, one on the right).
www.teampclab.pl
MOA 2009 Poland #2, AMD Black Ops 2010, MOA 2011 Poland #1, MOA 2011 EMEA #12
Test bench: empty
So Orochi is 4 core if so Id take it each module is per a side(large upper and smaller lower linked = module)
Thuban @4 GHz + Big Typhoon VX
Windows 3.1 starts on Phenom II X6 4GHz | Форум СЦБиcтов - Railway Automation Forum
No. You aren't going to have L3 (or L2 in your theory I suppose) sitting between the cores in a module, they would be more tightly linked than that. All the information we have already points to orochi being 4 modules anyway.
Does anyone else get the feeling that AMD is playing with us/Intel? I mean, showing such a provocative die shot with the important fine details blurred out kinda seems like they are intentionally trying to confuse the hell out us!
Amm am i not seeing 4 L2's "unconnected" is it not true that the cores of a module are suppose to share the L2 not to mention other elements? Why put one part on the module on the left and another on the right?
Coming Soon
im getting the feeling this is just showing us what 2x K10 cores would look like with a little more L2 @32nm vs 2 BD modules with less L2
I think the 2 module theory can safely die now. Bobcat + bulldozer theory is interesting, but the modules seem to have too many similar/identical structures.
Perhaps we're actually looking at a six core part. The road-map that was posted earlier:
Shows Orochi not as an eight core part, but a >4 core part. My best guess here is that only the top two are actual "modules". The bottom 2 are single cores, with lots of cache, designed to get lots single threaded performance. Heterogeneous computing.
Hell, it's just as likely something else, but that's the only thing I can think of that makes sense right now. If true, it's hard to believe AMD would let something like that out of the bag.
Could be that this is a Fusion part... but it would look strange for a Fusion part too.
Last edited by Hans de Vries; 09-01-2010 at 01:59 PM.
~~~~ http://www.chip-architect.org ~~~~ http://www.physics-quest.org ~~~~
I'm becoming more convinced of my six-core theory. The only part about it that doesn't make sense is why AMD would show their hand like this.
This is the 8core/4module part and the image is heavily photoshoped (that's why the 2 module above look different/bigger).It's just AMD being cautious.
Motherboard: GigaByte P67UD4 f6 | CPU: Intel 2500k 4.5ghz 1.26v | Memory: GSkill 2x4gb @ 1600mhz 1.34v | PSU: SeaSonic X650 Gold 650W | Video: AMD 6970 Koolance water block 880c/1450mem 1.035v | HDD: WD 640gb cavier black: VelociRaptor 300gb: Intel x-25 g2 80gb | Sound: Asus xonar D1 | OS: W7 64bit
That is an 8-core Orochi.
And some blurring.
And some photoshopping.
Actual die shots are released at launch, not before. Don't start doing math on this, if you think the "single threaded client performance from a server benchmark" numbers were way off, anything done off of this die shot will be even more incorrect.
So, this isn't an actual die shot? just a mock up? the modules aren't different sized?
Forgive me, but it does seem a bit funny to create a fake die shot, blur out the 'sensitive' parts, and then present it to the world as the real thing at a GF event...
Last edited by hurleybird; 09-01-2010 at 12:55 PM.
It's a fake by AMD.
I think that the yellow highlighted parts are the visible corners of the real cores. You can see smaller parts on the top because they put larger fake cores to there.![]()
-
Bookmarks