33 % more memory bandwidth and 20 % more SPs with a minor loss couldn't lead to 40+ % performance increase. There has to be more to this than 1600->1920 SPs. Obviously assuming that both runs would be ran with ~similar hardware and software, which I have hard time believing.
Or then it's fake.
Where did you read that there isn't more than that?Originally Posted by Calmatory
Do you really expect that AMD will add 20% more SP and call it a day? There would be no need for secrecy if that were the case.
I really think that AMD will be targeting a major increase in DX11 and Tesselation performance strictly for the 6870. I wouldn't expect much improvement in DX10 and older games, this seems to be more of a change to 5k series architecture to make it more "future proof".keep in mind that whatever they do now, will probably just doubled when they go to 28nm, which means it will be near the same size. so if they do 300mm2 now, it will be right around 300mm2 at 28nm, with about double the perf.
if all they are doing is dropping the 5th SP to shave a little space, it might get them back 5-10% board space, for a 2% perf loss. which they then use to beef up tessellation, and were back to the same size, but 30% faster in Dx11, same in older games.
however im betting its not a simple SP layout change, something massive has to happen to see any real perf change, and im betting the 6870 will not be any larger than a 5870
But I find it very very VERY unlikely that cayman will NOT beat 480GTX. It's very reasonable to believe that it will target a 512 Cuda Fermi (DX11 ofc).
Last edited by Dimitriman; 08-27-2010 at 12:26 PM.
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there is more going on than sp's and memory bandwidth.
for a long time it has been a mystery as to why the 5870 was only 60% faster than the 4890 while doubling almost everything. then the card was still liked because nvidia could barely beat their previous gen, and everyone stopped talking about why it wasnt much faster.
perhaps whatever bottleneck(s) the 5870 had has been improved in SI.
There was a talk/rumor that the efficiency of their execution unit block(superscalar and five ALUs wide) is not that stellar so that they worked on improving that part of the design.
The IPC of each SP for AMD and NVIDIA for Dx11 generation is generally lower than Dx10 equivalents.
That means Dx11 has something to do with latency / complexity of instructions?
i have not seen much about shader model 5.0 but it is probably trivial to change the hardware for it. it's pretty complex how all of this gets broken down. first a programmer writes a shader. it is compiled at runtime. this allows the shader to run on any compliant architecture. the code goes through a couple software layers until it is in the form of machine code (0's and 1's) and then it runs on the hardware.
the problem comes from the fact that computer graphics changes so fast that hardware slows it down. reusing parts of the design is hard because it will be too slow but redesigning it takes too long. a careful balance is necessary to remain on top.
looking at current archs we see nvidia screwed up somewhere. i cant say exactly but they definitely tried to do too much and got behind schedule. that probably happened early on judging by a 6 month delay. ati went for quickest time to market and tried to get their old arch updated enough to be acceptable at dx11. from that we must figure out what is slowing it down the architecture. it's hard because documentation is scarce and you cant view all part independently.
320 5d -> 480 4d = 50% increase...
Also, the other changes that hopefully we see this generation is the dual triangle setup which will help with tessellation.
All of that in under 400mm2 is amazing, again if it is all true which we will have to wait at least a few more weeks until we get more leaks/info.
Originally Posted by motown_steve
Every genocide that was committed during the 20th century has been preceded by the disarmament of the target population. Once the government outlaws your guns your life becomes a luxury afforded to you by the state. You become a tool to benefit the state. Should you cease to benefit the state or even worse become an annoyance or even a hindrance to the state then your life becomes more trouble than it is worth.
Once the government outlaws your guns your life is forfeit. You're already dead, it's just a question of when they are going to get around to you.
become.....
[IMG][/IMG]
When AMD had 64-bit and Intel had only 32-bit, they tried to tell the world there was no need for 64-bit. Until they got 64-bit.
When AMD had IMC and Intel had FSB, they told the world "there is plenty of life left in the FSB" (actual quote, and yes, they had *math* to show it had more bandwidth). Until they got an IMC.
When AMD had dual core and Intel had single core, they told the world that consumers don't need multi core. Until they got dual core.
When intel was using MCM, they said it was a better solution than native dies. Until they got native dies. (To be fair, we knocked *unconnected* MCM, and still do, we never knocked MCM as a technology, so hold your flames.)by John Fruehe
Now that's interesting, so in layman terms, can we expect a half rate DP FLOP rate from Northern Islands chip family instead or a fifth rate in Evergreen ?
become.....
[IMG]....
since ATi uses a 16 wide SIMD it should be 64 sp's per core for SI. you could have 448sp's or 512sp's. 480 is xtremely unlikely.
essentially that is what they have now but with some baggage. each register is still going to be 128bits with 12 read and 4 write ports. this is about 45% of the shader unit and it contributes a lot of power.
I've read your SP's as SPU's, hope you don't mind
Based on my understanding of the rumors floating around, I think what LordEC911
is talking about is ATI/AMD making one more 10 SIMD engine part on the chip.
Today we have, on the 5870, 20 SIMD engines, 16 wide and each with 5 SP's.
If I remember correctly the SIMD engines are physically grouped as 10 each,
like they were two times a 5770.
This gives us 20x16x5 --> 1600 SP's
Tomorrow we have, if the 6870 rumors of today pans out, 1920 SP's. If we
think that ATI/AMD made things the easy way, then we perhaps will see 3 units
of 10 SIMD engines.
Joint with a 4D rumor we get 30x16x4 --> 1920SP's
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