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Thread: AMD's Bobcat and Bulldozer

  1. #301
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    Quote Originally Posted by madcho View Post
    Yeah, but approximation mean it's not the good real result of the function. So it's a mistake to use it.
    ...
    No, it is not black and white. It depends on application if it is better to use approximation or not. For example, there really is nothing bad in using approximation if it gives good enough result, lets say like in games for meaningful speedup. But if you would be doing some really meaningful calculation you should not use approximation.

    Second example, in industrial controls, there is lot of applications where you need to calculate complex things, but in most cases approximation is lot faster and gives good enough result. As machines have error margins themself, there is no point doing some calculation with only small improvement over approximation when machine (mechanical things you know) itself limits the control accuracy.

  2. #302
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    Quote Originally Posted by blindbox View Post
    Eh? The way I see it, AMD added tons of stuff to enhance single threaded performance. It's not just one or two things. Are you sure you're reading the same slides I am reading?

    Sandy Bridge vs Bulldozer is going to be fun times.

    Is an 8-core sandy bridge coming to the desktop?

    indeed ... tired of people making fail prediction in advance with no hard benchmark numbers to put their claims to the test

    id really love an 8 cores high end sandy bridge vs zambezi
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    Quote Originally Posted by JF-AMD View Post
    Dual proc client systems are like sex in high school. Everyone talks about it but nobody is really doing it.

  3. #303
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    Quote Originally Posted by Chumbucket843 View Post
    IPC isnt the same across different architectures. for example a single SSE instruction can do 4 multiplies on 32bit floating point numbers in one instruction (mulps). fmul can do only one. yes, sse is explicitly data parallel but that is part of the weakness of ipc measurements.

    a better example would be a sine function. you can use the taylor series to get a good estimate. modern x86 cpu's take ~40-100 cycles to execute the fsin instruction.
    Aren't modern FPUs implementing trigonometric functions like sinus with internal lookup tables?

  4. #304
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    Quote Originally Posted by informal View Post
    Yeah,3 years from now when Bulldozer launches,right?
    The way AMD is taking it's time with BD, it just may be 3 years before we see anything.
    As quoted by LowRun......"So, we are one week past AMD's worst case scenario for BD's availability but they don't feel like communicating about the delay, I suppose AMD must be removed from the reliable sources list for AMD's products launch dates"

  5. #305
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    Quote Originally Posted by Sn0wm@n View Post
    indeed ... tired of people making fail prediction in advance with no hard benchmark numbers to put their claims to the test

    id really love an 8 cores high end sandy bridge vs zambezi
    Quoted for truth. We need LESS BAD information.
    Nobody can see the future. They said AMD would go bankrupt. They said buying ATi was a mistake. Well, here we are.

    I emphatically defy anyone to see the future.

  6. #306
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    Quote Originally Posted by BatteryOperated View Post
    Quoted for truth. We need LESS BAD information.
    Nobody can see the future. They said AMD would go bankrupt. They said buying ATi was a mistake. Well, here we are.

    I emphatically defy anyone to see the future.
    i will found 4 to the calc i'll do in 30min.

    it's 2+2 ...

    I found a way to know futur

  7. #307
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    Quote Originally Posted by madcho View Post
    i will found 4 to the calc i'll do in 30min.

    it's 2+2 ...

    I found a way to know futur


    enough with the trolling ....
    WILL CUDDLE FOR FOOD

    Quote Originally Posted by JF-AMD View Post
    Dual proc client systems are like sex in high school. Everyone talks about it but nobody is really doing it.

  8. #308
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    Quote Originally Posted by Katzenschleuder View Post
    Aren't modern FPUs implementing trigonometric functions like sinus with internal lookup tables?
    I have just measured this and there is no way that modern x87 FPUs compute this with taylor series because the results are simply delivered too fast for that.
    The same counts for sqrt and so on, so I think it is very likely that modern x87 FPUs use internal lookup tables.

  9. #309
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    Quote Originally Posted by Katzenschleuder View Post
    I have just measured this and there is no way that modern x87 FPUs compute this with taylor series because the results are simply delivered too fast for that.
    The same counts for sqrt and so on, so I think it is very likely that modern x87 FPUs use internal lookup tables.
    Some FPUs implement the CORDIC algorithm:
    http://www.convict.lu/htm/rob/trigonometry_reloaded.htm
    http://www.drdobbs.com/184402614;jse...PSKHWATMY32JVN

    But I'm not sure if today's still do.
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  10. #310
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    cordic has been used widely for 50 years but with many variations and optimizations.
    Quote Originally Posted by madcho View Post
    Yeah, but approximation mean it's not the good real result of the function. So it's a mistake to use it.
    it's not a mistake.
    http://en.wikipedia.org/wiki/Metrology
    when you are in real world situations perfectly accurate instruments dont exist and the amount of sig figs is completely unecessary.
    Quote Originally Posted by SEA View Post
    It could be counted as 9 multiplies, actually:
    with intermediate results a=x^2 and b=x^5:
    x - (x*x*x)* (1/3!) + (b=((a=x*x)*a*x)) * (1/5!) - (a*b) * (1/7!)
    yeah, i am just showing the basics of an algorithm for a typical CISC instruction.

    keep in mind that those temporary variable use memory space, more than the original program. this is a common tradeoff. also you can see that going for higher accuracy is significantly more expensive.

    also the factorials can be precomputed which saves a lot of muls. go ahead and break down those dependencies chains too.

    --------

    there are other approximations for the sine function but the taylor series is common and simple. all i am trying to show is IPC is not an independent metric for ISA's.

  11. #311
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    I know I sound stupid and I know relatively little about the structure of the chip, but from everything i read so far about single threaded design of BD, I'm gonna go ahead and throw a conspiracy theory out there:

    AMD is hiding a key feature of BD for single threaded performance: It will be capable of some form of Reverse Hyperthreading.

    AMD is hiding this though.. but you heard it here first!
    Or maybe I should not post after a few beers.
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  12. #312
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    Quote Originally Posted by Dimitriman View Post
    I know I sound stupid and I know relatively little about the structure of the chip, but from everything i read so far about single threaded design of BD, I'm gonna go ahead and throw a conspiracy theory out there:

    AMD is hiding a key feature of BD for single threaded performance: It will be capable of some form of Reverse Hyperthreading.

    AMD is hiding this though.. but you heard it here first!
    Or maybe I should not post after a few beers.
    ..like how? All I can think of is instruction level parallelism, a.k.a. superscalar processing which has been employed for years. As in: Take bunch of instructions and try to divide them among available resources(idle execution units) and hope for the best.

  13. #313
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    He's trolling. We've debunked that one hundreds of times.

    The reality is there is a lot that we are not sharing because we just don't want the competition to know what they are up against. I like the look of surprise instead at launch.
    While I work for AMD, my posts are my own opinions.

    http://blogs.amd.com/work/author/jfruehe/

  14. #314
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    Hey John,any chance we can listen to the archived audio from the Hot Chips,like webcast or similar?

  15. #315
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    Quote Originally Posted by Dimitriman View Post
    AMD is hiding a key feature of BD for single threaded performance: It will be capable of some form of Reverse Hyperthreading.
    Yeah, I'm sure the decoders just hand out the ops to each of the integer core schedulers, odd-even like.

    On another note:

    http://www.anandtech.com/Gallery/Album/754#6

    Throughput advantages for multi-threaded workloads without significant loss on serial single-threaded workload components.


  16. #316
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    Quote Originally Posted by terrace215 View Post
    Yeah, I'm sure the decoders just hand out the ops to each of the integer core schedulers, odd-even like.

    On another note:

    http://www.anandtech.com/Gallery/Album/754#6

    Throughput advantages for multi-threaded workloads without significant loss on serial single-threaded workload components.

    Throughput advantages for multi-threaded workloads without significant loss on serial single-threaded workload components.

  17. #317
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    its funny to see how different people emphatize on different word to suit their agenda ... LOLL terrace you make me lol all the time .. keep it up
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    Quote Originally Posted by JF-AMD View Post
    Dual proc client systems are like sex in high school. Everyone talks about it but nobody is really doing it.

  18. #318
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    XS should have troll of the year awards or something!
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  19. #319
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    Fun fact of the day: Dogs still bark!
    Quote Originally Posted by radaja View Post
    so are they launching BD soon or a comic book?

  20. #320
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    Quote Originally Posted by god_43 View Post
    XS should have troll of the year awards or something!
    place your bets now!

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  21. #321
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    Quote Originally Posted by Sn0wm@n View Post
    its funny to see how different people emphatize on different word to suit their agenda ... LOLL terrace you make me lol all the time .. keep it up
    In this case terrace interpreted it correctly. "Without significant loss" implies there is a loss but it isn't significant. If there was instead a gain it would be worded very differently.

    /end english lesson

  22. #322
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    Quote Originally Posted by trinibwoy View Post
    In this case terrace interpreted it correctly. "Without significant loss" implies there is a loss but it isn't significant. If there was instead a gain it would be worded very differently.

    /end english lesson


    yes there is a loss but its not phenomenal or anything ... thus why the *without signifiant loss* but terrace focused on the word loss .... thus the reason why i slammed his post ....


    but thank you for pointing out the obvious that yes there was a loss and B it wasnt significant ... you just proved my point
    WILL CUDDLE FOR FOOD

    Quote Originally Posted by JF-AMD View Post
    Dual proc client systems are like sex in high school. Everyone talks about it but nobody is really doing it.

  23. #323
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    Could someone summarize what was learned from the info at HotChips?

  24. #324
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    When are the benchmarks coming out? It's all nice to read about cpu design and all but we need some hard numbers.
    I hope for the best but will be suprised if it even beats Nehalem Uarch. Just have a feeling it would not touch SandyB. Would love to be proven wrong.
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    Single-threaded performance will have significant improvement.


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