PhenomMsrTweaker: Cool and Quiet customized

[kink]

Yes, the warning about C&Q is only related to custom C&Q (both techniques interfere with each other, as the tooltip suggests). Otherwise it's no problem and you are encouraged to use C&Q unless you have good reason to, and then you should control it with the percental CPU speed settings for each power scheme in case you want to restrict it to a certain P-state range. It makes no difference for the tweaker's other functionalities.

[DedEmbryonicCe1]

Firstly i will say that this 910 chip with this foxconn behaves a bit odd im not sure bios understands this cpu correctly(it boots 2ghz Nb and on AM2+ it should boot 1800 as one thing)

That is normal if your AM2+ system was single-plane. AMD specs Deneb chips with a lower NB/HT speed for single-plane operation. 2GHz is only the default for dual-plane motherboards.

[RaV[666]]

Thx for that info DedEmbryonicCe1,was thinking only am3 allowed 2ghz HT/NB on stock.

Kink, i have more input with verified data as today im sober and fully functional ;-).
I tried again carefully editining register lile you said, but error persists(reboot and no reboot)
I tried disabling and enabling CnQ in bios, no go.
I tried different power profiles in windows (as not all of them enable CnQ anyway), no go.
I tried startiing up Phenomsr, and with error window in background setting service/main window with correct settings.This works up to the next boot, when i have to do all the setting again, in the service window it displays previously set settings but it seems that for de error and CnQ only settings in main/start window are relevant.
Neither pure or phenomsr CnQ seem to use P4 on my cpu/mobo.

As i wasnt sure i was modifiying register correctly i set it through phenommsr (with error in background) and tried that too, bet error still persists.
When i start manually pheniomsr service it stops itself immedietaly, and doesnt seem to affect CnQ speeds,i think it errors too.
CnQ settings seem to be changable only through main window of phenommsr (with error in the background), but they are zeroed upon reboot.
So with this version, only way to use it is to fire it up,hide error (clicking ok in error window closes program),set manually all states, click apply ,exiting program, fireing it up again (this time no error) and it works only till the reboot :-/.

P4 state (when in error mode) is:
All multis 8x
Cpu Vid 1.3 (my max official vid,thats a non BE chip)
NB Vid 1.225 for some reason, maybe its my fault.

And when i set all this things at or below P3, it stops erroring.
I think that old Phmsr worked because i i recall correctly it had only 2 power states.
Are there any command line options which would bypess P4 altogether or disabled checking it ?

[kink]

AM2+ is dual-plane, AM2 is single-plane. And AM2+ is officially rated for HT up to 2.6 GHz; AM2 is capped at 1 GHz.

Simply ignoring the exception is dangerous as the program's state may not be valid anymore. If the service stops immediately, there's probably something wrong with your registry entries. You may wanna start from scratch: delete the HKLM\Software\PhenomMsrTweaker key altogether. Then start the GUI, ignore the exception (since it seems to work for you nevertheless, but in general this is not a good idea), customize your P4 and apply. Then open the service dialog, check the 'make permanent' checkbox and make sure the settings below reflect your new P4 settings, otherwise click on the update button. Then apply here too. The PhenomMsrTweaker service should be running then, if it isn't, something else is wrong. After that, you may enable custom C&Q, which should make use of P4 if you set the P-state bounds accordingly.

[CobraXP]

OK I think I got the hang of it. Works great so far. Thx kink for the hard work.

[kink]

You're welcome. New version 2.0.4 out, including some minor GUI bugfixes (including no more exceptions in case P4 has not been initialized by BIOS and defines an invalid voltage). I also switched to Visual Studio 2010.

[CobraXP]

Awesome job kink. Should I just uninstall the previous one? Thx.

[CobraXP]

You're welcome. New version 2.0.4 out, including some minor GUI bugfixes (including no more exceptions in case P4 has not been initialized by BIOS and defines an invalid voltage). I also switched to Visual Studio 2010.

Thank you. Works like a champ on Asus M4A785TD-V EVO and Phenom II X6 1090T with CnQ off in bios.

[cyclometric]

Some undocumented features:

• In case your mainboard features an IT87xxF SuperIO controller (detectable via SpeedFan etc.), you may let the service manage up to 3 fans via PWM. You'll need to dive into the registry (regedit.exe), navigate to HKLM\Software\PhenomMsrTweaker and add string values (names: 'Fan1', 'Fan2', 'Fan3'). Each string consists in an arbitrary number of control points separated by '|'. Each control point is defined by an integer specifying the CPU temperature (in °C) + ':' + fan speed in percent (another integer). Linear interpolation is used to connect the control points.
  For example: 'Fan1' = '30:50|40:75': The first fan (most likely the CPU fan) runs at 50% speed at temperatures <= 30°C, at 62.5% at 35°C and at 75% at temperatures >= 40°C.
  If at least one such string is found and a supported IT87xx controller is detected, fan management is enabled. If a fan's string is missing, it is run at 100%.
  An optional DWORD value named 'PwmRamp' may be used to transition slowly to other speeds. Its value specifies the maximum jump of each fan speed (again in percent) from one interval to the next (500 ms).

I just added the FAN1 value to my registry and upon reboot, I am very pleased with how it's working. So, now, kink, do you know which other fans PMt can control? Because SpeedFan normally could only control the one plugged into the CPU header, even though 3 headers are actually PWM rated on my board (790XT-UD4P, with Phenom 940 Deneb).

I would love to have it controlling the 2 fans in the other 2 PWM spots (the so-called "PSU" header and the "Sys1"). I guess I could add the values for FAN2/3 and see if it makes a difference, I'm just skeptical it will.

But regardless, thank you so much for going back to work on PMT (if I can so-abbreviate it) -- I love it, and my temps have never been so low! You rock!!

[kink]

Thanks for the roses and glad to hear this feature has not been overlooked.
Which 3 fans can be managed depends upon how the headers are connected to the SuperIO controller, so the simplest option to find out is to experiment with it, e.g., set the fan to 1% ('FanX' = '0:1'), restart the service and check which fan slows down.
My Asus M3A78-T features an IT8720F controller, fan1 is the CPU fan (regular 4pin-header), fan3 is the first chassis fan (3pin only) and fan2 either the PSU or the second chassis fan (again 3pin; my fans attached to these headers do not support PWM, so I don't know and don't care). The interesting thing is that PWM still seems to works with the 3pin headers: my fan3 doesn't support PWM, but it is attached to a Zalman Fan Mate 2 rpm regulator, which in turn is connected to the mainboard's fan3 header. The regulator seems to translate the PWM signal to actual voltage changes and hence allows me to manage the fan. So I guess you may just as well be able to manage PWM-capable fans attached to 3pin-headers too.
Also note that the fan speed percentage is not really 0-100% - this range is mapped to actual 20-100%, e.g., 12.5% translate to actual 30%. 0% though should disable the fan. So the fan speeds may differ from SpeedFan's. I chose this mapping because the controller natively supports it and it allows more fine-grained control in the upper range.

/edit: Btw, the CPU temperature is the one from the CPU's internal thermal diode, i.e., the core temperature shown in AMD OverDrive and CoreTemp, not the one the SuperIO controller is supplied with. I chose to use this sensor as it's fairly easy to access and because the CPU temperature seems like a good criterion for overall fan management to me: in most cases, a GPU-intensive task also stresses the CPU at least somewhat, thereby preventing energy savings and leading to higher CPU temperatures and hence increasing fan speeds. The most obvious thermal hot spots besides CPU and GPU are the voltage regulators, but their load is proportional to the CPU load. So I think this justifies the restriction of a single temperature as criterion for the management of all 3 fans.

[SEA]

Kink, how to see what version is running? I'm not sure if i have latest version...

[_Cyber_]

search the exe-file(s) in installation directory, select properties and there version ...

[SEA]

Version 2.0.3.0.
Is it valid version number? I doubt it.
Any clue? is it fresh or not?

What I ask Kink - it would be great to show version number in PhenomMSRTweaker window

[_Cyber_]

deinstall your version (2.0.3) and install the current 2.0.4

[nodex]

Hey kink, PhenomMsrTweaker is amazing, I've put it on every single K10 machine I've come into contact with.

I was looking at adding K8 support for a friend that's on an athlon 64 x2 6400+, and I'm not sure what to change to let phenommsrtweaker run on his system.

From what I can tell, I think what I need to do is add a check for a 6400+ (or any K8), using CPUID I think, then change all the Msr calls for K8 FIDVID and P-state stuff. I'm pretty sure 0xC0010042 is FIDVID_STATUS, and 0xC0010041 is FIDVID_CTL.
Does that seem correct?
I got this info from this pdf.

Also, the newest version of PhenomMsrTweaker broke MinVID for me. It's the default 0.0125V instead of the old 0.775V on my PII x2 550. Same goes for my Sempron 140. This isn't a bad thing, as min voltage on the sempron is higher than what I have it set at

On a side note, how do you figure out what fan controller the mobo has?

Thanks for the great software,
-Nodex

[kink]

Hi nodex,

after a quick glance at the linked pdf, I see quite a big difference in both architectures - P-states themselves don't seem to be customizable, the only option seems to be the direct transition to a given voltage and frequency via 0xC0010041. To keep it simple, you should focus on the service as it is the core, the .NET stuff is just for the GUI (which isn't necessary if the user is able to configure the service directly via the registry). Then it depends on what your target is - you could simply add a hack when the service is started to transition to a given voltage and frequency. C&Q will probably need to be off to ensure the settings remain active - a common scenario if you're only interested in applying overclocked settings. If the target is custom C&Q for K8, you will need to replace the switch-P-state command (by writing to 0xC0010063 if I recall correctly) by a write access to FIDVID_CTL, applying the voltage and frequency of the new "P-state" directly instead. You may need to use 2 writes - increase the voltage before increasing the frequency / decrease the frequency before decreasing the voltage.
You will basically need to look at all code segments performing low-level stuff (using the WinRing0 API) as the code is clearly tailored for K10.

/edit: About the min voltage - the previous limit of 0.775V was a deliberate choice of mine to keep the range on the safe side, but I then decided that it's really up to the user, so 0.0125V as min voltage, even if probably noone will ever be able to confirm it works.
About the fan controller: it's in IT87FanController's constructor. Information about the procedure can be found in IT87xxF references (I found a public one for IT8712F, newer ones aren't public anymore) and in the Linux codebase.

[nodex]

Regarding the fan controller, I installed SpeedFan and I have the same controller. Although, both of my fans are 3-pin and speed controlled using a trim pot, so I guess it won't make a difference.

For my cpu (phenom ii x2 550 unlocked to quad), i was able to put voltage at 0.725 with a 4x multi, but as soon as i did 0.7, it locked up. Right now, I'm at a comfortable 0.8V/6x underclock, and a 1.375V/17x overclock. I love this program.

I found this list of P-state VID/FID combinations for different K8 cpus. While my friend's 6400+ isn't listed, it's the same voltages + 200mhz for each state over the 6000+ (page 31). There's also this pdf for socket 939 and 754 cpus.

Anyway, so, how should I go about substituting P-state switching with P-state reading/FIDVID writing without removing support for K10? I think I'd also need a way of changing VID then FID when going up, and FID then VID when going down.
My coding skills are minimal, so I might need help putting the right funtions and function calls in the right places.
Right now, I'm using visual studio 2010 on my phenom ii x2 system (my main computer). I have direct access to two test machines (one with a sempron 140 (k10), and another with an athlon 64 3200+) and indirect access to a 6400+ (over rdp, or asking him to do something via chat while he's using the system).

Thanks,
-Nodex

[nodex]

Hey RaV[666],

Have you fixed your problem yet?
I had the same exact error on my brother's computer (phenom 9550). Followed Kink's directions but for all states, got it to work and then custom set my own states for the service. It's all working now.

I went ahead and made a .reg file for your 910. It sets all the p-states to have a 13x multi, 1.4 cpu vid, 1.225 nb vid for all 4 cores.
Delete the old phenom msr tweaker reg key, then add my attached one.

[kink]

Although, both of my fans are 3-pin and speed controlled using a trim pot, so I guess it won't make a difference.

That may be true, as the fans need to either support PWM directly or be attached to a fan controller translating the PWM signal to voltage changes for the fan (via my Zalman Fan Mate 2, for example).

Anyway, so, how should I go about substituting P-state switching with P-state reading/FIDVID writing without removing support for K10? I think I'd also need a way of changing VID then FID when going up, and FID then VID when going down.
My coding skills are minimal, so I might need help putting the right funtions and function calls in the right places.

Sadly, if I could point out all the needed changes in a forum reply, it would probably take more time than including K8 support myself . If you know some C++ and are willing to learn a bit about some low-level stuff, here's a great opportunity to do so. The first reference would be the official AMD doc you linked earlier, everything you need to know is there - the limits are readable from FIDVID_STATUS (including the default multiplier, max multi and max voltage), the changes are performed via FIDVID_CTL (the encoding scheme of multis and voltages is listed in the table, the register description contains the offsets of each field, so that you know which bits to set/read; this involves some bitwise shifting and masking, so make sure you're settled in this topic). The WinRing0 API (OlsApi) is used to access the CPU's registers in kernel-mode (e.g., Rdmsr() to read from a register, Wrmsr() to write to it), so you'll need to scan the service code for primarily these 2 functions and dependencies. Use CpuId() (I think ) to distinguish between K8 and K10 (and please cache the result, as there's always a costly transition from user-mode to the kernel driver and back involved).
For custom C&Q, you'll need to modify the P-state settings format in the registry from K10 registers to a FIDVID_CTL register values (masked, so only the bits for VID and multi). During a transition, you then write these values (again masked, i.e., the other bits are copied from the current value) to each core's FIDVID_CTL (I assume there's a complete set of MSRs for each core as for K10). As noted earlier, you may need to do this in 2 steps, voltage then multi or the other way around if the CPU doesn't handle it in hardware. That would be my recommended starting point: implementing custom C&Q for K8 too. If there's a K8 CPU, you should skip appying custom P-state settings and unlocking P-states when the service is started. Then look in CustomCnQThread for necessary changes to include K8 support. K8 support would then be configurable via direct registry manipulation (due to different P-states format, e.g., you could use a human-friendly string format like "10|10@1.2" and parse it to FIDVID registers when initializing the service, then use them in CustomCnQThread).

So don't give up, good luck

[nodex]

Actually, it sounds like a good plan.
I'll stick to just service and registry support for now.
I think for now it'll be fine just to hack up your code and change all p-state stuff appropriately (using the status and ctl registers for K8 instead).
The bitwise shifting and masking looks easy enough from looking at your code (>> and <<, plus && with certain values).

I've tested reading from FIDVID_STATUS and writing to FIDVID_CTL using crystalcpuid, with success,
Using CPUID() seems easy enough to distinquish between K8 and K10.

I'll add checks for safe VID and FID switching anyway, just in case.

How do I cache results from a CPUID() call?

I'll hack together something hopefully soon. I aquired a new K8 system to test on, so this should be fun.

Afaik, there's just one set of MSRs. Writing to FIDVID_CTL changes both cores at the same time. Apparently, however it's done, if only one core has its VID or FID changes, it won't change if going lower, and both cores change if going higher.

[kink]

How do I cache results from a CPUID() call?

Simply by keeping the result in a variable instead of using a CpuId() call for every check.

Afaik, there's just one set of MSRs. Writing to FIDVID_CTL changes both cores at the same time. Apparently, however it's done, if only one core has its VID or FID changes, it won't change if going lower, and both cores change if going higher.

I think there are separate MSRs for each core, see section 10.5 in the AMD doc. Quote from 10.5.7.3:

The processor driver enforces a “highest requested P-state” policy. Both cores will be in the highest P-state requested for either core. The processor driver keeps track of P-state transition requests and only reduces the P-state of either core after the operating system has requested that the P-state of both cores be reduced. When the operating system requests that the P-state of either core be increased, the processor driver increases the P-state of both cores.

This seems to apply to your results as well, so it may actually be done by the hardware itself, not the CPU driver. Testing is easy: modify an MSR on the first core, then read it from the second, if they don't match, there are separate MSRs, and you'll need to write to all cores.
Also have a look at tables 66 and 67 in section 10.5.7, as K8 doesn't seem to be able to transition from a given multi to an arbitrary other multi (only up to an absolute delta of 1, i.e., half and whole steps up and down, of this strange VCO multi, which is identical to the actual multi if >= 8 and the doubled multi if < 8; [nerd]explanation: this is the numerator of the actual multi, and they'll use a denominator of 2 for multis < 8, skipping every other clock cycle; the aim is to modify the clock generator's frequency in steps of half and whole reference clocks[/nerd]). It also looks as if you need to do the transition in 2 steps (and some iterations for a transition to an arbitrary other multi). Section 10.5 is very detailed and should contain all the necessary information.

Have fun and keep in touch

/edit: Note that you can debug the service. Start Visual Studio with admin rights (the service needs admin rights in order to load the driver) and select the right configuration (native platform, debug build). Then copy the WinRing0 binaries to the configuration's output folder. After setting the service as StartUp project and launching it with F5, you can debug it like any other app by placing breakpoints etc. Use Ctrl+C (in the console window) to stop the service and ignore the following exception by clicking on continue.

[zanzabar]

thread rez

this thing is great for the thulban, but since the thulban can use different voltage per core and this can only control the stated of up to 4 cores in unganged mode it would be nice if there was an update.

this is a life saver for the summer as my 1090 has a vid of 1.3 but it can do that at under 1.2V so cool and quiet was raising the voltage to throttle it to 800mhz @ 1.225V, now it dose 1V as it should and it dropped a good 30W idle

[kink]

The unganged mode supports all cores, not just up to 4. Additionally, all K10 (incl. K10.5 etc.) CPUs support different voltage IDs per core, but all cores get the same actual voltage - corresponding to the currently highest voltage ID of all cores.

[zanzabar]

The unganged mode supports all cores, not just up to 4. Additionally, all K10 (incl. K10.5 etc.) CPUs support different voltage IDs per core, but all cores get the same actual voltage - corresponding to the currently highest voltage ID of all cores.

interesting, when i was testing it before i set it to ganged it would always have 2 cores at p0 but the other 4 at p4 without load. and with AOD and everest it showed with cool and quiet enabled (before using this and disabling cool and quiet) it would show the correct voltage for each core depending on its pstate, now they all have the same. am i doing something wrong or is AOD messing with me.

i think that u covered the voltage as amd was messing me, but i just want to be sure. the power output has gone way down though and its a god send when u have an old AC unit and its over 100f outside all the time to beable to use the computer

[kink]

when i was testing it before i set it to ganged it would always have 2 cores at p0 but the other 4 at p4 without load.

That's probably due to inappropriate custom C&Q settings - don't simply switch from ganged to unganged mode, you'll also need to adjust the other parameters (the thresholds are per core in unganged mode, for example, and you'll also need to lower either the interval or the number of samples to reduce the delay from load/idle detection to P-state transitions - of key importance when dealing with loads which do not affect all cores, otherwise the performance is notably decreased!).

now they all have the same.

OverDrive shows the current voltage ID of every core, so it should show different voltages if the cores are in different P-states (and if the voltages of the P-states differ, of course). That's what it does on my machine, and I haven't heard otherwise from any other user. In ganged mode, all cores are in the same P-state at any time (well, apart from some milliseconds for all transitions), so that the voltages are the same.

Btw, if your default C&Q used a VID of 1.225V for 800 MHz, your BIOS is obviously buggy as the default is about 0.8V afaik.