Any BSEL done yet for mobile Penryn?

[aicjofs]

Was this 'someone' a reliable source?

Unfortunately not. I wouldn't exactly call them unreliable either. but they said that "they had found someone who had..." and we all know how that goes. That whole discussion revolved around if it was somehow driver/OS related, so I just threw it out for the information of the thread.

Sadly I also may have dropped the ball on this thread. An "anonymous" member private messaged me that he/she had a hint on how to accomplish this via the Silego chip, and asked me for some more information. That was back in May and I just have been swamped this summer and spaced it out.

I should go on another google search and see if any new info out there the last 3 months, but really XS, and like 1 or 2 laptop sites are the only places with any quality discussion.

[aicjofs]

Ok a little searching turned up some info since this thread was started.

http://forum.notebookreview.com/showthread.php?t=393027

Short summary is : The TME locked PLL (in this case an ICS) can be disabled by pulling the TME pin from high to a low assuming PCI2 output is not being used.

and more info

http://forum.notebookreview.com/showthread.php?t=399856

Short summary is: This is for PLL's not supporting overclocking by software, as in my case of the SLG8SP510 or at least what Abo said. For a 200 to 266 mod the FS_B can be pulled to ground by either A) lifting the FS_B pin and grounding, or B) if it has inline resistor simply pulling to ground. Where it would seem to get dicey for this Silego PLL is for other freq mods. As FS_A has USB output on it so you can't lift it, and FS_C has a voltage threshold for high where it if above 2V will go into test mode.

So for my original line of questioning for this thread it looks like my only option is to do what Cirthix said and hard mod at the clockgen

[ziddey]

damn, that's pretty cool. someday i'll see if tme is locked or not, and see how high my x3100 is willing to scale. would be too much if it'd allow me to play cs:s

[cirthix]

the clockgen's pins could be tied to the cpu socket. this TME thing looks promising

[madgravity34]

Hey guys, this sounds like an interesting change of events . I am really hoping that this could work in other areas as well, for example, would similar ideas work for modding non-ocable desktops such as my 2nd gen dell XPS with p43.0C proc? The pll does not support oc'ing (or it just might be that my SATA drives lock up really quickly once any FSB mhz is changed).

[STEvil]

Hey guys, this sounds like an interesting change of events . I am really hoping that this could work in other areas as well, for example, would similar ideas work for modding non-ocable desktops such as my 2nd gen dell XPS with p43.0C proc? The pll does not support oc'ing (or it just might be that my SATA drives lock up really quickly once any FSB mhz is changed).

pinmods work find on p4's. tons of info around if you use search/google.

[Tetrafluorometh]

Did anymore come of this