2009 AMD analysts day [official thread]

[Vit^pr0n]

Is it true that Fusion will have 480 stream processors? That's more than the 3870, and close to a 3870x2! Of course that doesn't mean it's close to that performance since the architecture is different, but the amount itself is impressive.

[Manicdan]

Is it true that Fusion will have 480 stream processors? That's more than the 3870, and close to a 3870x2! Of course that doesn't mean it's close to that performance since the architecture is different, but the amount itself is impressive.

a 4770 is 640 SPs, at 750Mhz, so if they can get this to run at 1ghz, it would be right with a 4770, which is strong enough to play any game for consoles at 1680x1050 and good eyecandy

[informal]

This Llano Fusion chip is a perfect match for next gen Xbox console .

[Manicdan]

This Llano Fusion chip is a perfect match for next gen Xbox console .

yeah i was thinking the same thing. these fusion chips really could create some killer consoles, the ps3 slim v2 could be the size of a ps2 slim with one of these (and i wonder if it will be possible in the future to sli/xfire your consoles...)

[Vit^pr0n]

a 4770 is 640 SPs, at 750Mhz, so if they can get this to run at 1ghz, it would be right with a 4770, which is strong enough to play any game for consoles at 1680x1050 and good eyecandy

That is very very impressive. Having that kind of performance added with a 5800 would be amazing.

I also think that this is the kind of chip we'll be seeing in the new xbox since ATi is working on that. With the RROD and heat issues of the 360, something tells me MS wants a chip like this. Though I really hope the next-gen consoles will have the capabilities of ATi/Nvidia's latest GPU's at the time ( R1200? GT700? ). That would be the time when games make the next giant leap in graphics.

[informal]

The contender for the most ridiculous article of the year(or even the decade ):
Fuad Abazovic's latest and "greatest":
http://www.fudzilla.com/content/view/16425/1/

Bulldozer has two quad cores stitched <---[what the hell... ]

Written by Fuad Abazovic
Friday, 13 November 2009 11:01

Image

Some parts shared

According to Chuck Moore, Corporate Fellow and CTO Technology Development of AMD, the new Bulldozer X86 architecture has “two tightly linked cores.” [After this it all goes downhill and he gets lost in the dark woods of stupidity ]


Image

If you look at the picture above, posted in Chuck's presentation, Bulldozer has two quad cores with an integer scheduler and the two cores share two FPU 128bit FMAC schedulers. <--[]

Each int scheduler quad <--[Oh my God ] has its own L1 cache that talks with L2 shared cache used by both cores and FPU units and finally, the last layer has Shared L3 cache as well as Nortbridge support. (You lost me at 'each'. sub.ed.)

This CPU will be designed to easily interconnect with graphics, but such a product probably won't launch before 2012. AMD claims Bulldozer and Bobcat are two new x86 cores targeting different usage models.

"Bulldozer will be a completely new, high performance architecture for the mainstream server, desktop and notebook PC markets that employs a new approach to multithreaded compute performance for achieving advanced efficiency and throughput. Bulldozer is designed to give AMD an exceptional CPU option for linking with GPUs in highly scalable, single-chip Accelerated Processing Unit (APU) configurations. Bobcat will target the low power, ultrathin PC markets with an extremely small, highly flexible, core that also is designed to be easily scaled up and combined with other IP in APU configurations,” claims AMD.

AMD didn’t save its breath to attack Intel for stitching two cores together, and in two years from now, it plans to stitch two cores that will share some parts. As far as we know 8-core Nehalem EX can get to 8 native cores even at 45nm and we are quite sure that for late 2010 Intel plans to launch an 8-core 32nm Westmere based CPUs. <--- [totally clueless and lost ]

AMD plans Bulldozer for desktop and server market in 2011.

He has outdone himself with this "piece of news". Newsflash Fudo,you have no idea what you are talking about!
There is a Bobcat related article too,not much less ridiculous than this one of course.Enjoy!

[Behemot]

The choice for APU's (LIano, Ontario) was SOI GPU or bulk CPU. According to Fuad, AMD has chosen the second possibility. Both should be made in 40 nm bulk with some RV8x0 GPU. Interesting for me.

[rcofell]

The choice for APU's (LIano, Ontario) was SOI GPU or bulk CPU. According to Fuad, AMD has chosen the second possibility. Both should be made in 40 nm bulk with some RV8x0 GPU. Interesting for me.

Huh? Unless I'm mistaken, I seem to remember Bergman alluding to the fact they're SOI with the comment that the GPU portion is not a risk item on SOI.

While AMD's future Fusion offering would certainly have cost/size advantages when used in a game console... it's still a year out and I think the next xbox360 revision should prove to be interesting at a sooner date. Also, like chumbucket mentioned, just because it has a decent amount of SPs doesn't mean the performance is the same as it would be for a discrete implementation... there are still issues of TDP and more importantly the memory interface (I really wish they would've leaked some details on the Fusion memory controller ).

Now what I'm waiting for is the point when the GPU portion will be more native and not necessarily require going through a software driver, which AMD seems to acknowledge.

[Solus Corvus]

Now what I'm waiting for is the point when the GPU portion will be more native and not necessarily require going through a software driver, which AMD seems to acknowledge.

I am interested in this as well. It seems to be a possible conclusion to this GPU + CPU combining trend.

But it would require a new instruction set to be able to access those GPU functions, hopefully standardized. Otherwise the only way to access the gpu will continue to be through drivers + API.

[Behemot]

Huh? Unless I'm mistaken, I seem to remember Bergman alluding to the fact they're SOI with the comment that the GPU portion is not a risk item on SOI.

Well, I know, Fuad; but there are some other indicators, like at http://www.anandtech.com/cpuchipsets...spx?i=3673&p=4 last the picture - Brazos is not colored like 65/45/32 nm (and 28 nm is too far away from 2011). Also http://xtreview.com/addcomment-id-64...rocessors.html talks about some possibilities to TSMC test Fusion on 40 nm bulk process.

[Hornet331]

He has outdone himself with this "piece of news". Newsflash Fudo,you have no idea what you are talking about!

Thats not news... its already in the history books.

[Chumbucket843]

a 4770 is 640 SPs, at 750Mhz, so if they can get this to run at 1ghz, it would be right with a 4770, which is strong enough to play any game for consoles at 1680x1050 and good eyecandy

they wont be able to make it clock that much higher just because its on 32nm. remember this is low power. it will also need a wider bus or faster memory to perform as well as a dedicated graphics card like the 4770.

[Manicdan]

they wont be able to make it clock that much higher just because its on 32nm. remember this is low power. it will also need a wider bus or faster memory to perform as well as a dedicated graphics card like the 4770.

your right that how good the memory interface is will have a huge impact, but just for the core SP power, it can sure offload alot of power.

for power consumption, im not sure what to guess. when going low power, generally its for cheap PCs. the gpu part of the core i feel should have no problem reaching 800-900mhz while staying under 40W, and to offer those features in a single chip, for ultra small PCs that can game, id think they pc could sell for 500-600$ and this chip be ~300$ of that. (youd be paying for convenience, more than performance per dollar)

[Calmatory]

a 4770 is 640 SPs, at 750Mhz, so if they can get this to run at 1ghz, it would be right with a 4770, which is strong enough to play any game for consoles at 1680x1050 and good eyecandy

Remember that the manufacturer and process have changed. I'd say that the odds are that the GPU part will run sub 600 MHz.

Two reasons: Power consumption and "excess" gpu power(compared to the memory bandwidth).

[hurleybird]

Remember that the manufacturer and process have changed. I'd say that the odds are that the GPU part will run sub 600 MHz.

Two reasons: Power consumption and "excess" gpu power(compared to the memory bandwidth).

The process is improved over the old one and if the didn't want 'excess' GPU power they would simply put in a smaller GPU instead of wasting die space.

[To(V)bo Co(V)bo]

Think of bobcat like a quad core atom with a killer igp. It could litterally replace almost 90% of all PC's. I think bobcat has a really bright future imho. Just think of the power a netbook or nettop would have with one of these. You could use these in a nice little HTPC that could actually game pretty decent. It would kick ions butt big time, you wont even need a IGP. Ion will be desroyed, since intel and AMD can do it all in one chip! Whats the point in keeping ion around if it just adds cost and extra power use. Nvidia cant compete in this market without a x86 processor, ion will become extinct.

[Lightman]

The process is improved over the old one and if the didn't want 'excess' GPU power they would simply put in a smaller GPU instead of wasting die space.

This!

Besides I think that GPU part will be on separate PLL which means we should get a multiplier option in BIOS to change freq.
For Laptops it will run at low clock, for desktop only TDP will be a limit.
Graphics performance though will be limited by memory subsystem, but there is a chance of mitigating that problem by sideport and giving GPU access to shared L3 cache.
But please not forget that this APU will be targeting a lot of GPGPU tasks where memory bandwidth is not always a problem and 480ALUs will be utilized fully.
I hope we will see 1.2-2GHz APU clocks, if not stock then after some OC for sure

[informal]

Bulldozer's vision in Fred Weber's head(ex AMD fellow back in 2005) :
http://www.scribd.com/doc/7316303/CPU-Aug-05 (page 108)

When asked : "Q :What are the top three items on your dream list of CPU innovations?" ,Mr Weber(a man who actually was a driving force behind the whole Clustered MultiThreading in the first place;look at his presentations back in 2005) responded:
"FW : Well, I’m thinking a lot about the heterogeneous multiprocessing right now. The other area that is of great interest but there isn’t a solution for right now is how to best automatically, whether in hardware or software, use multiple threads in order to speed up programs that are not traditionally parallel. There are a bunch of techniques, such as run-ahead processing, being investigated. But there’s no obvious solution right now. "
Can you see the effects of the above quote in the bulldozer module diagram ?

[Mechromancer]

Bulldozer's vision in Fred Weber's head(ex AMD fellow back in 2005) :
http://www.scribd.com/doc/7316303/CPU-Aug-05 (page 108)

When asked : "Q :What are the top three items on your dream list of CPU innovations?" ,Mr Weber(a man who actually was a driving force behind the whole Clustered MultiThreading in the first place;look at his presentations back in 2005) responded:
"FW : Well, I’m thinking a lot about the heterogeneous multiprocessing right now. The other area that is of great interest but there isn’t a solution for right now is how to best automatically, whether in hardware or software, use multiple threads in order to speed up programs that are not traditionally parallel. There are a bunch of techniques, such as run-ahead processing, being investigated. But there’s no obvious solution right now. "
Can you see the effects of the above quote in the bulldozer module diagram ?

AMD always pimped the Bulldozer out to be a single-threaded maniac. The only way I see that happening is if an ENTIRE module (2 cores and all) can process a single thread by itself. Two real cores working as one to chew through a single thread should be interesting. The Integer and floating point performance of a single module should make that interesting.

[Oliverda]

Bulldozer's vision in Fred Weber's head(ex AMD fellow back in 2005) :
http://www.scribd.com/doc/7316303/CPU-Aug-05 (page 108)

When asked : "Q :What are the top three items on your dream list of CPU innovations?" ,Mr Weber(a man who actually was a driving force behind the whole Clustered MultiThreading in the first place;look at his presentations back in 2005) responded:
"FW : Well, I’m thinking a lot about the heterogeneous multiprocessing right now. The other area that is of great interest but there isn’t a solution for right now is how to best automatically, whether in hardware or software, use multiple threads in order to speed up programs that are not traditionally parallel. There are a bunch of techniques, such as run-ahead processing, being investigated. But there’s no obvious solution right now. "
Can you see the effects of the above quote in the bulldozer module diagram ?

Interview with AMD's Fred Weber - The Future of AMD Microprocessors (March 31st, 2005)

When Intel announced Hyper Threading, AMD wasn't (publicly) paying any attention at all to TLP as a means to increase overall performance. But now that AMD is much more interested and more public about their TLP direction, we wondered if there was any room for SMT a la Hyper Threading in future AMD processors, potentially working within multi-core designs.

Fred's response to this question was thankfully straightforward; he isn't a fan of Intel's Hyper Threading in the sense that the entire pipeline is shared between multiple threads. In Fred's words, "it's a misuse of resources." However, Weber did mention that there's interest in sharing parts of multiple cores, such as two cores sharing a FPU to improve efficiency and reduce design complexity. But things like sharing simple units just didn't make sense in Weber's world, and given the architecture with which he's working, we tend to agree.