Hm, 128-bit SIMD units?
Sandy Bridge is already confirmed to have its AVX SIMD as full 256-bit implementation:
I think the idea is that they can combine the SIMD units to process a 256-bit instruction, or have them process two 128-bit instructions, depending on what's needed.
I think the idea is that they can combine the SIMD units to process a 256-bit instruction, or have them process two 128-bit instructions, depending on what's needed.
Variable width when it comes to SIMD units-2 threads per FPU/SIMD cluster,total 256b wide execution. AVX is supported and this news was out a while back(posted by AMD fellow at AMD devcental).
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