2009 AMD analysts day [official thread]

[Nedjo]

hope that mods approve this thread?

After Intel's "Sandy Bridge" leak, here is AMD's CPU/GPU mix up: four K10 cores w/ 1MB L2, no L3 and a side strapped GPU core.

More here.

Bulldozer samples in 2010:

Just in from web cast:


Bulldozer won't have classic "core" but something AMD calls modules !
Bobcat is alive,sub 1W operation,super low power but has 90% of mainstream performance of today's mainstream CPUs! Fully modular and ready for APU implementation, has OoO abilities,2-way execution,very high performance and IMO looks like one BD "module"

Now on to BD: confirmed CMT design! More in a minute!
In : Int units are shared(2x2way execution),1 256b wide FPU.My God,DDboy hit the nail on the head,he is 99% correct in his speculation.

more: highly advance clock gating,shutting down individual modules for best perf./watt ratio,Turbo like APM functionality.
AMD states all of this is going to be a game changer.

presentation from Chekib Akrout, General Manager, Technology Group could be very interesting: http://phx.corporate-ir.net/External...xUeXBlPTM=&t=1

Bobcat core(more precise word:module) diagram:


edit: Smartidiot beat me to it,so i will put Bobcat diagram instead of BD one .

Didn't see these two posted yet:

[Aerwidh]

So, Bobcat is for taking on Atom and such?

[w0mbat]

Yeah, its a low-pwer CPU design. And it looks very promising!

[informal]

Yes ,it is very low power but keeping the mainstream performance of today's CPUs. They mentioned sub 1W power draw(idle i suppose),and pretty high OoO performance(citing "90% of today's mainstream performance levels" probably meaning athlon II),so Atom will be fighting a much faster per clock and per Watt cores,but also Atom will evolve by the time ontario cores launch.

[informal]

Q&A: SOI 32nm for GPU is not "a big issue" and doesn't require major redesign for Llano production. 32nm Llano comes first.BD and Bobcat are same underlying design but developed by 2 separate teams. Bobcat uses one of the BD cores(modules) and is optimized for low power and APU integration.

edit: APU products will be refined on year basis-a bit on CPU and/or GPU side,but the new Fusion design will have a more aggressive roadmap compared to previous CPU roadmaps.

[Smartidiot89]

So, Bobcat is for taking on Atom and such?

Atom, and most importantly ARM

[flippin_waffles]

wow. lol looks like AMD have been busy little beavers behind the scene.

[Oliverda]

GLOBALFOUNDRIES

[Nedjo]

Atom, and most importantly ARM

it would be overoptimistic trying to fit x86 power needs in head-2-head fight with ARM... Intel can't do that with In-order Atom, so I don't see how can it be achieved with OoO CPU... and I'm not talking about idle power...

ARM with GloFo's low power 28nm tech will be unchallengeable when it comes to power, and vastness of ARM market can cover more expensive specialized production technology.

[flippin_waffles]

Q&A: SOI 32nm for GPU is not "a big issue" and doesn't require major redesign for Llano production. 32nm Llano comes first.BD and Bobcat are same underlying design but developed by 2 separate teams. Bobcat uses one of the BD cores(modules) and is optimized for low power and APU integration.

edit: APU products will be refined on year basis-a bit on CPU and/or GPU side,but the new Fusion design will have a more aggressive roadmap compared to previous CPU roadmaps.

Is this what he said to the question somebody asked about what has been taped out? My psis poor sattelite internet (xplornet) couldn't keep up to the stream set to 50k.

[edit]

Also, about the cores. So each core in the new architecture is called a "Bulldozer" core, while products such as Zambezi will be cpu's made up of individual "Bulldozer" cores? That's the way i'm reading it. And "Bobcat" is a completely different core than "Bulldozer", is that correct?

[rcofell]

I noticed that they mentioned Bobcat and BD are designed for the around the same ISA... yet the Bobcat slide only mentions SSE1-3, when Bulldozer should be SSE1-4+... So that can't be an absolute statement, as I wouldn't imagine them trying to include all of the latest extensions in Bobcat, to keep core size/power down.

Did they specifically say that Bobcat shares any pieces with BD? They said the whole two separate teams with different design points, but I don't remember them saying anything about how much implementation they shared.

Since one of Bobcat's design points is being synthesize-able, I wonder how much they're positioning it to compete with Intel's Atom. I assume AMD won't be able to license out the cores (for SoCs) to other companies like Intel will be doing at TSMC :X

[rcofell]

Is this what he said to the question somebody asked about what has been taped out? My psis poor sattelite internet (xplornet) couldn't keep up to the stream set to 50k.

No, someone asked specifically about the fact that the Fusion chips will be the first time a GPU has been on SOI and if there are any challenges I believe. They dodged the question about what has been taped out (as they don't release internal milestones) and just pretty much said things are on track for the schedule they've announced.

[fellix_bg]

Hm, 128-bit SIMD units?
Intel's Sandy Bridge is already confirmed to have its AVX SIMD as full 256-bit implementation:

[Solus Corvus]

Hm, 128-bit SIMD units?
Sandy Bridge is already confirmed to have its AVX SIMD as full 256-bit implementation:

I think the idea is that they can combine the SIMD units to process a 256-bit instruction, or have them process two 128-bit instructions, depending on what's needed.

[Nedjo]

GLOBALFOUNDRIES

I find this slide about 32nm tech interesting:



50% better than 45nm! That's awesome considering how good is 45nm tech especially with the latest upgrades that gave us "C3" Phenom II

[Tomasis]

coming years look exciting.. i guess i cannot not stop buying hehe

[vietthanhpro]

Hm, 128-bit SIMD units?
Intel's Sandy Bridge is already confirmed to have its AVX SIMD as full 256-bit implementation:

lol
But this is 128 bit FMAC. I'm not sure that Bulldozer willn't use YMMs 256 bit.

[Oliverda]

I find this slide about 32nm tech interesting:

50% better than 45nm! That's awesome considering how good is 45nm tech especially with the latest upgrades that gave us "C3" Phenom II

So, it will be SOI + high-k metal gate + 2nd gen. immersion lithography. Intel doesn't use SOI and they will use the immersion lithography for the first time on 32nm.

[rcofell]

it would be overoptimistic trying to fit x86 power needs in head-2-head fight with ARM... Intel can't do that with In-order Atom, so I don't see how can it be achieved with OoO CPU... and I'm not talking about idle power...

ARM with GloFo's low power 28nm tech will be unchallengeable when it comes to power, and vastness of ARM market can cover more expensive specialized production technology.

Well, ARM is even getting into OoO designs now, so it's not just straight power consumption, but the computing power available in a power envelope and core area, since we're heading into more and more integration. With a Fusion concept AMD might have a chance, seeing as that's what ARM offerings have right now, ie. a SoC with a cpu core plus some other accelerators (eg. Nvidia's Tegra or TI's OMAPs). However that'd require a lot of effort to pursue on AMD's part, which I would question them having the resources for at the current time.

[informal]

I think the idea is that they can combine the SIMD units to process a 256-bit instruction, or have them process two 128-bit instructions, depending on what's needed.

Variable width when it comes to SIMD units-2 threads per FPU/SIMD cluster,total 256b wide execution. AVX is supported and this news was out a while back(posted by AMD fellow at AMD devcental).

[terrace215]

50% better than 45nm! That's awesome considering how good is 45nm tech especially with the latest upgrades that gave us "C3" Phenom II

That's not product improvement, it's some unspecified measure of transistor improvement. Probably related to power/leakage as well, since that would provide the larger number to brag about, and they are finally using metal gates at this node, which helps a lot with leakage.

[FlanK3r]

very interesting was talking about Fusion

[terrace215]

Per Anand, all the Llano APU ("fusion") stuff in 2011 has Phenom II-based CPU cores.

So, while they will likely have a stronger GPU side, the CPU side will be about 2 generations behind Intel's Sandybridge/Ivybridge.

Bulldozer is high-end desktop and server only (at least in 2011).

[Nedjo]

That's not product improvement, it's some unspecified measure of transistor improvement.

don't want to go in to your need to state obvious...

of course it's a measure of transistor improvement! Better transistors -> better CPUs! Yeah?

Probably related to power/leakage as well, since that would provide the larger number to brag about, and they are finally using metal gates at this node, which helps a lot with leakage.

there are bunch of possible parameters that could be related, but regardless it's good to hear that GloFo has mastered HKMG so well

[Nedjo]

Per Anand, all the Llano APU ("fusion") stuff in 2011 has Phenom II-based CPU cores.

pfff Anand! Wouldn't be surprised if you were Anand my dear terrace215 fellow

Anand just has that unexplainable urge to place Intel in any AMD related article, and if possible at the top:

http://www.anandtech.com/cpuchipsets...oc.aspx?i=3673