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Thread: Dresdenboys' blog: AMD Bulldozer - Patent based research

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  1. #1
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    Quote Originally Posted by Chumbucket843 View Post
    trace caches are a good way to utilize bandwidth. nice job keeping us updated on bulldozer mechromancer.

    i am still sketchy about efficiency of decoders. do they help with CMT?
    As Mechromancer said, everything is speculative. From what I've seen and read, I think that the Decoders would suit the needs of a clustered CMT back-end. They are 4-wide with the capability to decode microcoded (complex) and fast path instructions in parallel (for 2 threads). That means up to 8 Macro-Ops per clock (4 per thread, and I found indications, that they will stick to the Macro-Ops, i.e. groups of one ALU/FP op and one AGU op). Even with only fast path instructions this would result in 4 Macro-Ops per clock being distributed alternatingly or in a different pattern to the threads, while each cluster is only capable of executing 2 of these Macro-Ops at max.

  2. #2
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    I've updated my blog with some thoughts about future power management. It seems, getting Sam Naffziger and his team into the boat was a very smart move.

  3. #3
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    Quote Originally Posted by Dresdenboy View Post
    I've updated my blog with some thoughts about future power management. It seems, getting Sam Naffziger and his team into the boat was a very smart move.
    This is very interesting as you said any turbo like thing will work great with this. This can not only provide exact specs for overclocking each core independently but even other parts of the cpu.
    Coming Soon

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