yeah but not 16 full lanes of pci-e 2.0 bandwidth of overhead... basically I just want to understand if the capacity could ever be used fully.
If two gfx cards process a frame, that takes both their full 16lanes, so a combined 32 lanes of data from gfx
IE: GFXs(32 lanes of data) <--- Hydra Chip (16 lanes)<---(16lanes)PCI-e controll on die lynfield..
The processor is getting the computational questions from the game engine running, lets say 32lanes worth of data..but since the pcie can only send 16lanes of data to the hydra...how can the hydra render the full 32 lanes? To me it would seem that on lynnfield you would be limited to the same 8x 8x config.. regardless if you have more potential lanes, as you can only ever recieve 16lanes worth of data, at any given time. This in essence seems like they are putting an over powered chip on the lynnfield platform, as it can't use the full capabilities...but your still paying for the silicon.




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