DFI UT X58-T3EH8 - new 4/28 beta bios = 235Bclk

[eva2000]

Been playing with DFI's latest 4/28 pre-public beta bios and it seems to have improved memory clocking stability for Elpida IC modules as well as improved my max H20 cooled bclk validation from 233 on 3/28 pre-public beta bios to 235bclk on 4/28 bios. 4/28 is pre-public beta so flash at your own risk from here.

4/28 bios seems to be more tolerant of very tight subtimings .. so close to sub 9min 32M pi at <3900Mhz!



sub 4000Mhz 32M



Max BCLK





Super Pi 1M to 32M

• 1M = 9.328s
• 2M = 21.000s
• 4M = 46.422s
• 8M = 1min 42.750s
• 16M = 3min 45.782s
• 32M = 8min 11.859s

System:

• i7 920 3836A756
• EK Supreme LT 1366 / FESER 480 / MCP655
• DFI UT X58-T3EH8 04/28 beta
• 512MB Inno3D 8800GT OC Edition
• 6GB Corsair Dominator GT DDR3-2000Mhz 7-8-7-20
• 750GB Samsung SATAII
• Silverstone OP1200 PSU
• Dual boot - WinXP Pro SP3 / Vista Ultimate 64Bit SP2

Bios settings used.

Genie BIOS Setting

CPU Feature
Set VR Current Limit Max: Disabled
Thermal Management Control: Disabled
EIST Function: Disabled
CxE Function: Disabled
Execute Disable Bit: Disabled
Virtualization Technology: Disabled

***** Logical Processor Setting *****
Intel HT Technology: Enabled
Active Processor Cores: All

DRAM Timing
Channel Interleave Setting: AUTO
Rank Interleave Setting: AUTO
Memory LowGap: 1792M

DRAM Command Rate: AUTO
CAS Latency Time (tCL): 6
RAS# to CAS# Delay (tRCD): 7
RAS# Precharge (tRP): 6
Precharge Delay (tRAS): 20
REF to ACT Delay (tRFC): AUTO
Write to PRE Delay (tWR): AUTO
Rank Write to Read (tWTR): AUTO
ACT to ACT Delay (tRRD): AUTO
Row Cycle Time (tRC): 31
Read CAS# Precharge (tRTP): AUTO
Four ACT WIN Time (tFAW): 31
Ch1 Round trip latency: AUTO (-15 to +16)
Ch2 Round trip latency: AUTO (-15 to +16)
Ch3 Round trip latency: AUTO (-15 to +16)
tREFI: AUTO

Voltage Setting
O.C. Shut Down Free: Enable O.C.S.D.F
CPU VID Control: 1.4500v
CPU VID Special Add Limit: Disabled
CPU VID Special Add: 103.30%
Vcore Droop Control: Disabled
DRAM Bus Voltage: 1.71v
DRAM PWM Switch Frequency: Nominal
DRAM PWM Phase Control: 2 Phase Operation
CPU VTT Special Add: 0.0875v
CPU VTT Voltage: 1.53v
VTT PWM Switch Frequency: Nominal
VTT PWM Phase Control: 2 Phase Operation
CPU PLL Voltage: 1.80v
IOH/ICH 1.1V Voltage: 1.29v
IOH Analog Voltage: 1.20v
ICH 1.5 Voltage: 1.5v
ICH 1.05V Voltage: 1.05v
DIMM 1/2 DQ/DQSTB Bus VREF: -00.0%
DIMM 3/4 DQ/DQSTB Bus VREF: -00.0%
DIMM 5/6 DQ/DQSTB Bus VREF: -00.0%
ADDR/CMD VREF Control: Disabled
x DIMM 1/2 ADDR/CMD Bus VREF: 110
x DIMM 3/4 ADDR/CMD Bus VREF: 110
x DIMM 5/6 ADDR/CMD Bus VREF: 110
CPU QPI Drive Strength: Normal
IOH QPI Drive Strength: Normal

Exit Setup Shut down: Mode 2
O.C. Fail Retry Counter: Enabled
O.C. Fail CMOS Reload: Disabled

PPM Function: Enabled
Turbo Mode Function: Disabled
1 core Max Turbo Ratio: 22x
2 core Max Turbo Ratio: 21x
3 core Max Turbo Ratio: 21x
4 core Max Turbo Ratio: 21x
CPU Non-Turbo Clock Ratio: 19x

* BCLK/UCLK/QPI Controller Settings *
QPI Control Settings: Enabled
QPI Link Fast Mode: Enabled
QPI Frequency: AUTO
CPU Base Clock (BCLK): 230 Mhz
Boot Up CPU Base Clock: AUTO
PCIE Clock: 110 Mhz
DRAM Frequency: 8xx Memory multipliers
UnCore Frequency: 16x Uncore multipliers

CPU Spread Spectrum: Disabled
PCIE Spread Spectrum: Disabled

[LinusTech]

Terrific news. I've been eagerly waiting for a new BIOS for this board. My chip seems to suffer from some FSB holes and there is one RAM divider that gives me no POST.

Part of the problem is probably that I'm running 12GB. Hopefully they've done a little bit of work on it in that regard...

[eva2000]

6x2GB i hear can be tricky.. yet to try 6x2GB myself so no idea how well it handles.

Starting to hit probably thermal limits of my i7 920 3836A756 on H20 cooling as 32M Pi seems to be topping out around 4680mhz with HT disabled. Only managed to shave ~1 second off my best 32M pi time with i7 920.

[eva2000]

Did 2 runs on fresh Win 7 64bit RC install I did last night. Only change was CPU VTT voltage needed to pass Hyper Pi 8x 32M vs 4x 32M.

1. 8x 32M Hyper Pi HT Enabled - CPU VTT = 1.44v
2. 4x 32M Hyper Pi HT Disabled - CPU VTT = 1.47v needed more for 4x32M HT Disabled

RTL value for channel A changed when CPU VTT changed from 1.44v to 1.47v

RTL A/B/C = 56/57/58


RTL A/B/C = 55/57/58


Past bioses and tests, I found memory bandwidth in memtest86+ v2.11 was higher with HT disabled than HT enabled, so could explain why more CPU VTT volts is needed for HT disabled.

4//28 looking sweet indeed 8x 32M Super Pi instance via HyperPi @DDR3-2080Mhz 7-8-7-20 1T at 1.725v bios set vdimm = 1.730v real DMM vdimm.

[3oh6]

4//28 looking sweet indeed 8x 32M Super Pi instance via HyperPi @DDR3-2080Mhz 7-8-7-20 1T at 1.725v bios set vdimm = 1.730v real DMM vdimm.

damn, might have to break the old DFI out when i get a chance. see if it can give the Classified a run with these new killer BIOS's. nice results George

[cstkl1]

although lower but to share the excitement of this bios with the elpidas.. simply amazing
had the whole weekend will labour day to test it..

vtt 1.4v rtl 54,55,57/58 ( trying to bring it down sommore) ( everest read is already at 22.1k atm)

[cstkl1]

rtl 54/55/57 vtt 1.35v (dmm read.. )



its just nuts this one stupid setting..
and everything turns gold

[eva2000]

damn, might have to break the old DFI out when i get a chance. see if it can give the Classified a run with these new killer BIOS's. nice results George

Thanks Jody... new bios really liking it. DFI making the same improvements on DFI DK X58 too... hopefully goes to DFI JR X58 too as I have that board up next heh.

cstkl1, looking good there mate - thanks to your contributions and findings too that poured there way into this 4/28 beta

[FragMagnet]

Thanks Jody... new bios really liking it. DFI making the same improvements on DFI DK X58 too... hopefully goes to DFI JR X58 too as I have that board up next heh.

cstkl1, looking good there mate - thanks to your contributions and findings too that poured there way into this 4/28 beta

Excellent results as always eva2000, please check your pm's !

[eva2000]

Excellent results as always eva2000, please check your pm's !

Thanks

Both cstkl1 and my DFI contact suggested with 4/28 bios, I check out setting BOOT Up CPU Base Clock to around 180-185bclk for better perrformance and stability. Seems to work as first test has me reducing my required CPU VTT volts from 1.43v to 1.37v for 8x 32M Pi test!!!!

* BCLK/UCLK/QPI Controller Settings *
QPI Control Settings: Enabled
QPI Link Fast Mode: Enabled
QPI Frequency: AUTO
CPU Base Clock (BCLK): 200 Mhz
Boot Up CPU Base Clock: 185 Mhz
PCIE Clock: 104 Mhz
DRAM Frequency: 10x Memory multipliers
UnCore Frequency: 20x Uncore multipliers

Bumped CPU VTT from 1.37v bios to 1.39v bios and IOH/ICH v1.1 from 1.11 to 1.13v for Linx stability

[eva2000]

First time using HD4870x2 CF on Win7 64bit RC OS and first time I've broken 30K mark in 3dmark06 and did it without even touching GPU/MEM clocks yet!

[eva2000]

My latest HD4870x2 Crossfire results

System:

• i7 920 3836A756
• EK Supreme LT 1366 / FESER 480 / MCP655
• DFI UT X58-T3EH8 04/28 beta
• 2x HD4870x2 Crossfire (Powercolor + Gigabyte flashed to Asus Top bios) with ATI Win7 9.4 (8.612 WHQL)
• 6GB Corsair Dominator GT DDR3-2000Mhz 7-8-7-20
• 750GB Samsung SATAII
• Silverstone OP1200 PSU
• Triple boot - WinXP Pro SP3 / Vista Ultimate 64Bit SP2 / Win7 Ultimate 64bit RC

3dmark2003 get the following error when i start it ??

Problem signature:
Problem Event Name: APPCRASH
Application Name: 3DMark03.exe
Application Version: 3.6.0.0
Application Timestamp: 41da8282
Fault Module Name: fmod.dll
Fault Module Version: 3.6.1.0
Fault Module Timestamp: 3e170d1b
Exception Code: c0000005
Exception Offset: 000109ca
OS Version: 6.1.7100.2.0.0.256.1
Locale ID: 1033
Additional Information 1: 0a9e
Additional Information 2: 0a9e372d3b4ad19135b953a78882e789
Additional Information 3: 0a9e
Additional Information 4: 0a9e372d3b4ad19135b953a78882e789

Read our privacy statement online:
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Throw in some wprime

[eva2000]

Pushing my GTs @DDR3-2160Mhz 7-8-7-20 1T

[Russ_64]

New Beta is posted for DK X58-T3eH6: 05/08
Major Reasons of Change:
1. Modify for MEMSET and Elpida chipset DRAM.
2. Added ch2,ch3 roundtrip.
3. Patch for winfast TV card issue.
4. Patch for PCIE RAIDcard issue.

[eva2000]

wrong bios for UT but yes 5/08 beta bios is out for all 3x DFI X58 boards http://i4memory.com/f80/dfi-x58-5-08-beta-bioses-17524/