X48 Rampage Formula Preview.

[situman]

Mike, you're right:

CPU Clk Skew = -100PS
NB Clk Skew = Normal

That's the magic number right there. All my 500FSB+ boot problems vanished into thin air. Of course I'm going to shoot for more this was my first attempt.

Hi can you please list some Bios settings? That's an awesome overclock you got there. Hopefully I will get a bonus and afford that cpu as well.

[Zucker2k]

Even with damaged cpu contacts, just that 100ps delay on CPU clock drive Ive run a near 8hr Prime95 blend pass at 400mhz FSB stable. Awesome. Now to try and see how far I can push this broken board!

With your board running that good, how are you going to justify rma to Asus? Back to older bios?

[mikeyakame]

With your board running that good, how are you going to justify rma to Asus? Back to older bios?

If those 3 contacts werent damaged I would have posted at 533mhz FSB! Damn board. It shuts down when I set 533mhz fsb now, it never did before, just hard locked bios screen.

[Zucker2k]

If those 3 contacts werent damaged I would have posted at 533mhz FSB! Damn board. It shuts down when I set 533mhz fsb now, it never did before, just hard locked bios screen.

533 FSB? I'm almost there with 8GBs of RAM.

[screwtech02]

The new Rampage bios works well on the P5E also.... Still workin on tweekin my Q6600, but its gettin there....

[Zucker2k]

Hi can you please list some Bios settings? That's an awesome overclock you got there. Hopefully I will get a bonus and afford that cpu as well.

Here is my easy Quad 500FSB with 8GBs of RAM:

Extreme Tweaker
Ai Overclock Tuner : [Manual]
CPU Ratio Setting : [9]
FSB Strap to North Bridge : [AUTO] : [400]
FSB Frequency : [500]
PCI-E Frequency: [100]
DRAM Frequency: [DDR2-1000]
DRAM Command Rate : [2N]
Dram CLK Skew on Channel A : [AUtO] : [300]
Dram CLK Skew on Channel B : [AUTO] : [300]
DRAM Timing Control: Manual
CAS# Latency :
RAS# to CAS# Delay :
RAS# Precharge :
RAS# ActivateTime :
RAS# to RAS# Delay :
Row Refresh Cycle Time :
Write Recovery Time :
Read to Precharge Time :

Read to Write Delay (S/D) :
Write to Read Delay (S) :
Write to Read Delay (D) :
Read to Read Delay (S) :
Read to Read Delay (D) :
Write to Write Delay (S) :
Write to Write Delay (D) :
DRAM Static Read Control : [Enabled]
Ai Clock Twister : [Stronger] : [Moderate]
Ai Transaction Booster : [Manual]
Common Performance Level : [09] you may be able to run PL8 stable with 4-4.25Ghz clocks. I find that with 4.5Ghz, I was only stable in windows by jacking up NB to 1.75v or moving from PL8 to PL9.

All Pull-ins = [Disabled] You can tweak these later if you want.

CPU Voltage : [Whatever your chip needs to be stable]
CPU PLL Voltage : [1.60v] set in bios, 1.66v real (for my board and chip)
North Bridge Voltage : [1.65v] with 8GBs of DDR2 @ 1000mhz 1:1
DRAM Voltage : [Whatever your chip needs to be stable]
FSB Termination Voltage : [1.56v] 1.48v real for 4.5Gh, 9x500fsb.
South Bridge Voltage : [1.100v]
SB 1.5v Voltage : [1.60v]
Loadline Calibration : [Disabled] A preference thing for me.
CPU GTL Reference : [0.62x]Generally, 45nm quads like 0.63x and 65nm 0.67x; my chip likes 0.62x all the way from stock clocks to 4.754Ghz.
North Bridge GTL Reference : [0.67x]
DDR2 Channel A REF Voltage : [AUTO]
DDR2 Channel B REF Voltage : [AUTO]
DDR2 Controller REF Voltage : [AUTO]
NB LED Selection : [NB Volt]
SB LED Selection : [SB Volt]
CPU LED Selection : [CPU Volt]
Voltiminder LED : [Up to you]
CPU Spread Spectrum : Disabled
PCIE Spread Spectrum : Disabled
CPU Clock Skew : [Delay 100ps] Thanks Mikeyakame
NB Clock Skew : [Normal] Thanks Mikeyakame

Advanced -> CPU Configuration

CPU Ratio Setting : [09]
C1E Suppport : Disabled
CPU TM Function : Disabled
Vanderpool Technology : Disabled
Execute Disable Bit : Disabled
Max CPUID Value Limit : Disabled

Have fun tweaking.

[situman]

Thanks man. Wish I was as knowledgeable in all these settings and stuff. Could never understand them. Are these voltages safe for 24/7? It looks ummm kinda crazy high for the chip to last more than a couple of months.

[SirDaemon]

I use my E8600 @ 4,4ghz - 8x550 with RAM 1:1, and it is stable.

Some weeks ago I tried to reach 575FSB 1:1 (that would be my RAM default) but i couldn't keep it stable, even with voltages raised a few steps.

Which skew do you think would help to stable it? CPU or NB?

[mikeyakame]

Try them both and tell us what results you get.

They are clock drive skews, so the time between when the Host FSB clock begins and when the CPU or NBs internal clock is driven in relation to it.

[Michowski]

I cant seem to get my overclock stable here. I am currently going for 4.0ghz but I last got a stable occt at 3867, 455fsb. I am at 460fsb (3910) and I cant get it stable. My current volts are as follows, any advice on what to try?

Edit: Nevermind I actually passed it finally. 4.0ghz here I come

[Michowski]

I cant seem to get 465fsb stable. All skews are on auto, 0802 bios. Any idea's?

Field Value
Sensor Properties
Sensor Type W83627DHG + W83791D + ADT7475 + ADP3228 (ISA 290h, SMB 2Ch/2Eh/20h)
GPU Sensor Type Diode (ATI-Diode)
Motherboard Name Asus Maximus Extreme / Maximus Formula / Rampage Formula
Chassis Intrusion Detected No

Temperatures
Motherboard 35 °C (95 °F)
CPU 25 °C (77 °F)
CPU #1 / Core #1 45 °C (113 °F)
CPU #1 / Core #2 45 °C (113 °F)
CPU #1 / Core #3 46 °C (115 °F)
CPU #1 / Core #4 49 °C (120 °F)
North Bridge 47 °C (117 °F)
South Bridge 42 °C (108 °F)
GPU Diode (DispIO) 44 °C (111 °F)
GPU Diode (MemIO) 44 °C (111 °F)
GPU Diode (Shader) 42 °C (108 °F)
WDC WD5000AACS-00G8B0 34 °C (93 °F)

Cooling Fans
Chassis #3 2689 RPM

Voltage Values
CPU Core 1.40 V
+3.3 V 3.17 V
+5 V 4.90 V
+12 V 11.98 V
+5 V Standby 4.80 V
FSB VTT 1.33 V
North Bridge Core 1.49 V
South Bridge Core 1.09 V
South Bridge PLL 1.55 V
DIMM 2.11 V
DIMM VTT 1.06 V

Current Values
CPU 25.49 A

Power Values
CPU 32.38 W

[mikeyakame]

Zucker,

I spent a few hours last night testing 1N command rate at 1066mhz, nearly got it down to 80 errors in Memtest Test #5 low mem range, down from 8000 when I first started. I think errors are my board, will see in a few days.

[Zucker2k]

Zucker,

I spent a few hours last night testing 1N command rate at 1066mhz, nearly got it down to 80 errors in Memtest Test #5 low mem range, down from 8000 when I first started. I think errors are my board, will see in a few days.

Woah! Really? What FSB?

[mikeyakame]

Woah! Really? What FSB?

Only 400Mhz. Thats all my busted board will let me do at the moment. 9 x 400 isn't 100% stable but 8 x 400 is fine, DDR2-1111 but PL is 9. Latency is around 62-63ns. Best it'll go.

Heres the settings I came up with!

At 1002Mhz: G.Skill PI8800 2x2GB

5-5-5-14-3-50-5-3-1N 9-3-5-4-6-4-6 14-5-1-6-6 2.0V

CMD Skew A Advance 25ps
CMD Skew B Advance 25ps
CLK Skew A Advance 100ps
CLK Skew B Advance 100ps
AI Clock Twister Light
DRAM Static Read Disabled
NB Clock Skew 100ps
CPU Clock skew 200ps
PL 9
Vnb 1.45
DRAM CTL/CHA/CHB REF Auto (these worked best haha only auto values that work better than manual selection)

Like I said my board is busted so I have alot of stuff disabled I usually use cause it's even more broken with them enabled right now! Even have Loadline disabled at present.

[EOD]

I still cant hit the magic 500 FSB. I can get the board to boot, but Vista crashes just past the loading screen. But I am able to push higher FSB with considerably less NB voltage! I am currently testing Prime with 4.3GHz 1.352v vcore at 478 FSB, ram at 1147 with the following voltages (actual): NB: 1.52v, PLL: 1.58v and FSB Termination: 1.26v.

The only settings I have changed from the previous 701 bios is the CPU clock Skew at Delay 100ps, and the NB clock skew at normal as recommended by Mikeyakame!

[mikeyakame]

You might be CPU limited. Not all CPUs are capable of doing such high FSB, luck of the draw I suppose. Also Luck of the board as well!

The way I see it is, you've gained more ground than previously that's what matters. If you've reached limits of hardware spare replacing parts you've done well Not many people can reach their hardwares limits, they usually reach their limit of knowledge before their limit of electronics

[mikeyakame]

I cant seem to get 465fsb stable. All skews are on auto, 0802 bios. Any idea's?

Field Value
Sensor Properties
Sensor Type W83627DHG + W83791D + ADT7475 + ADP3228 (ISA 290h, SMB 2Ch/2Eh/20h)
GPU Sensor Type Diode (ATI-Diode)
Motherboard Name Asus Maximus Extreme / Maximus Formula / Rampage Formula
Chassis Intrusion Detected No

Temperatures
Motherboard 35 °C (95 °F)
CPU 25 °C (77 °F)
CPU #1 / Core #1 45 °C (113 °F)
CPU #1 / Core #2 45 °C (113 °F)
CPU #1 / Core #3 46 °C (115 °F)
CPU #1 / Core #4 49 °C (120 °F)
North Bridge 47 °C (117 °F)
South Bridge 42 °C (108 °F)
GPU Diode (DispIO) 44 °C (111 °F)
GPU Diode (MemIO) 44 °C (111 °F)
GPU Diode (Shader) 42 °C (108 °F)
WDC WD5000AACS-00G8B0 34 °C (93 °F)

Cooling Fans
Chassis #3 2689 RPM

Voltage Values
CPU Core 1.40 V
+3.3 V 3.17 V
+5 V 4.90 V
+12 V 11.98 V
+5 V Standby 4.80 V
FSB VTT 1.33 V
North Bridge Core 1.49 V
South Bridge Core 1.09 V
South Bridge PLL 1.55 V
DIMM 2.11 V
DIMM VTT 1.06 V

Current Values
CPU 25.49 A

Power Values
CPU 32.38 W

Your problem is auto skews. They don't work properly like that, same with GTLs. Auto value on Clock Skews does nothing more than use base value, and if it doesn't then god knows how badly Asus AI functionality is setting them.

Auto is fine on voltages. But you can't just set Auto for settings which make or break stability at high FSB. They generally tend to break on auto

Try
CPU Clock Skew Delay 100PS
NB Clock Skew Normal
DRAM Clock Skew A & B start with Advance 100-150PS and slowly go towards Delay if possible. Delay gives higher memory bandwidth but also risks memory corruption if too much.

[Michowski]

Your problem is auto skews. They don't work properly like that, same with GTLs. Auto value on Clock Skews does nothing more than use base value, and if it doesn't then god knows how badly Asus AI functionality is setting them.

Auto is fine on voltages. But you can't just set Auto for settings which make or break stability at high FSB. They generally tend to break on auto

Try
CPU Clock Skew Delay 100PS
NB Clock Skew Normal
DRAM Clock Skew A & B start with Advance 100-150PS and slowly go towards Delay if possible. Delay gives higher memory bandwidth but also risks memory corruption if too much.

Im actually a noob to overclocking, could it be possible for you to explain to me what exactly skews are and what they do exactly? Also I upgraded to the 0802 bios and I couldnt get my current setup stable on there. I started over from 2.83ghz and slowly going back up. Im at 410x8.5 right now. Thanks for the reply

[Alien Grey]

Im actually a noob to overclocking, could it be possible for you to explain to me what exactly skews are and what they do exactly? Also I upgraded to the 0802 bios and I couldnt get my current setup stable on there. I started over from 2.83ghz and slowly going back up. Im at 410x8.5 right now. Thanks for the reply

Here's a nice explanation: http://en.wikipedia.org/wiki/Clock_skew

[DEFLORATOR]

I confirm that my Adaptec 3405 is working with bios 0802. At last. Thx guys!

[Alien Grey]

I confirm that my Adaptec 3405 is working with bios 0802. At last. Thx guys!

So, it looks like ASUS did their job well.

[Michowski]

Now how do you know when you need a positive or a negative and know what needs it?

[mikeyakame]

Well let me try and explain it easiest I can.

You have clock signals for each device on the bus, ie CPU, MCH, DRAM, GPU, SMBUS, CMOS, etc.

All the clock signals are driven from the Host Bus BCLK (base clock) and such it is used as a reference point.

Hardware such as CPU, Northbridge, Southbridge, etc all reference Host BCLK to drive their own internal clock signals. They sample certain reference points and values to best ascertain when they need to drive their own clock waves, and when they need to initiate both address and data strobes to communicate across the Host Bus. It's all about timing.

Now as the electrical traces between say CPU and Northbridge are a reasonable length, the data sent from Northbridge to CPU for example won't arrive instantaneously, it will arrive fractions of a nanosecond after it was sent which is picoseconds or PS. Now Intel gives out electrical design specs, and vendors are meant to follow them.

Within specification of the design we might know that minimum transit time will be 150ps when sending any data from MCH(NB) to CPU, so we compensate for the transit time by driving the CPU clock signal 150ps after the Host Bus BCLK voltage crossing point.
This is called skewing clocks. It's just using known data and making compensation adjustments to make sure that critical specs are within tolerance, and that commuincations between external devices on the common bus flow without incidence or get lost in transit.

The default skews are fine within AGTL+ FSB spec. Problem is AGTL+ (advanced gunning transceiver logic) has a design limitation of 400mhz BCLK (400mhz fsb) and past this it is impossible to keep within original spec and guarantee 100% reliable operation. The faster a clock frequency becomes, the smaller clock periods become. Now there is still minimum tolerances that have to be met, whether running 200Mhz FSB or 600Mhz FSB, and this is the kicker...the most critical tolerance called "Period Stability" which is basically the farthest apart two succesive clock signals are allowed to be before the system will hard lock. So whether you run 200 or 600, the Period Stability value, <= 150PS, still comes to play.

To give you an idea.
533Mhz FSB has a clock period of 1.86ns (1860ps)
466Mhz FSB has a clock period of 2.14ns (2140ps)
400Mhz FSB has a clock period of 2.5ns (2500ps)
333Mhz FSB has a clock period of 3.0ns (3000ps)

As clock period gets smaller with FSB frequency increase, the critical stability values don't change and become extremely problematic. You are trying to meet criteria designed around having two times as much time between successive clocks, with successive clocks being driven at double the speed. We've got alot less room for error or instability, so much so that even slight variations will crash or destabilize our system at least with default clock skews designed to be effective upto 400Mhz FSB, not taking into account vendor board design flaws, mass manufacturing variances, and so on.

So this brings me to where the money is

Intel realised this problem and of course secretly had a means of making post-manufacturing compensation through NB registers. So What are CPU and NB Clock Skew values you ask...

They are simply delay values that can be wound in on top of the skew values in the design. As we raise voltages and frequencies we get whats called Clock Jitter, it gets worse the farther you go beyond the electrical design limits of your particular board, also if your PSU can't keep up, and many other reasons. Clock jitter results in unstable clock signals, It could be as little as 50ps jitter, which means that when the clock signal is driven there is a 50ps max deviation from one driven clock wave to a successive clock wave or even between one driven many clock periods apart. It's just inconstent deviation, that's why its a huge problem. It may never deviate to the point it begins to destabilize things except once every 20 minutes or 2 hours. It may deviate farther than normal occasionally and this phenomenon if the system is idle probably won't be noticed, but if its under heavy load it may show up as a glitch, a pause, a brief hang, a random BSOD, or worst usually is a full hard system lock.

Now what the NB and CPU Clock Skew settings in bios are, is a means to manually compensate through "trial and error" for the most part since none of us own high priced Logic Analyzers to calculate these values with maths! by farther delaying when a clock is driven at the NB or CPU or even DRAM (we advance dram clocks sometimes depending on memory sticks to compensate for very short MCH read delay turnarounds and to obtain data validity), we can take into account the deviations from clock jitter and more importantly timing resolution (which is probably 50ps or so on the MCH, its too coarse for extremely high fsb but we can compensate with a combination of GTL References, Vtt, Vnb, Vcc, Clock Skews and other things) by eye and feel and response. It's no science it's a black art.

It takes time to get used to your particular hardware, and pay attention to the small details...how long it takes to POST, miniscule delays between BIOS POST codes on the LCD Poster, changes in OS response, even setup options being sluggish to select. There are so many things you can pick up on that believe it or not happen because of clock jitter and deviations. There will be FSB frequencies where you can have the bios and system tuned to respond amazingly fast, and others where no matter how hard you try the system is hit and miss. When this happens just go up or down a few mhz on FSB and try again, you might find a frequency that works better for your settings. Like I said up or down doesn't matter, BCLK drives FSB and its too high of a reference clock frequency so even going +-1mhz sometimes can completely destabilize settings you worked on for days to get right. Keep that in mind.

[Michowski]

Man I gotta give you mad props on that post. Very informative for sure. Learned a lot from that good read. Sounds like its definatly a talent to learn to get it all right. Right now I think I got fsb and cpu frequency's down along with manually setting volts to make it stable. I gotta learn how to do skews now that I have that option. Im able to go from 333-450fsb with the multi from 6-8.5 and get it stable with very little thinking about it involved. Its starting to become effortless to get it setup and stable that way. Ive been messing with that all day today and ive had very few crashes in occt. Sorry for all the questions before and making you type all that, im just really getting into overclocking now and its becomming very addictive lol. I appreciate the help man, thanks. Hope you dont mind if I pick your brain from time to time to get my system going the best I can and to just gain this knowledge.

[mikeyakame]

It's fine mate I don't mind. No point knowing all this useless information if you just keep it to yourself. Sometimes explaining it to another in a way thats easy to understand even helps things make a bit more sense to me. It's one thing being able to throw around a volley of big words, it's another being able to translate them back to english!

Below 450fsb this board is amazingly simple even with a quad core. It's above here things get tricky but it's still way more consistent than setting up a P45 based board for similar FSB frequencies. Once you get a hang of how your board responds in diff conditions and situations you'll find that it's actually very easy to get high FSB frequencies stable.

With 0701 bios my max 24/7 stable FSB is 481mhz with Q6600. Right now my cpu socket has damaged contacts and I think my voltage regulator is playing up too so can't show any amazing FSB results until I RMA my board early next week. Hopefully I'll have it back in a day or two, then I'll see how far I can push it with this new bios. I'm pretty certain 533Mhz FSB will post with a good working board. Even with a busted board, it wants to POST but right now I can't even get 450mhz FSB posting cause of 2 or 3 tiny cpu contacts!

Meh if I have it correct it seems the damaged contacts are within the Vcc/Vss land pin zone. Probably explains the unstable Vcc.