RV870 single-core, R870 dual-core, R800 quad-core?

[Helmore]

I know I had this discussion over at B3D but do you recall how exactly the TMUs are setup? Is it a quad for each SIMD? I thought that was my original assumption when looking at some of the architecture shots of R600/RV670 but I recall being told something different.

The TMUs are setup differently on RV770 than on R600/RV670. On R600/RV670 a TMU block was assigned to 4 SP blocks, each block from a different SIMD 'core'. This approach has its benefits, but it is a bit tough to scale it and that's why they abandoned it for RV770. RV770 has 4 TA units and 4 TF units per SIMD 'core'. Just check here: http://www.rage3d.com/reviews/video/.../index.php?p=5
There's one odd part though, and that is that there are 'only' 32 interpolators. But that will only become a bottleneck if you INT8 bilinear filtering, you won't notice it once you apply some more AF for example and then the bottleneck will shift to the filtering units. It's still weird though, as you'd expect a texture related unit to reside with the TF/TA units and thus also scale in capability along with those.

If they don't increase the number of SPs per SIMD, from 16-24, then there really isn't much they can do with RV790. They could up the SIMDs to 12 like was talked about before that isn't much of an increase.

AMD/ATi really needs to go back to back to back with strong GPUs if they really want to take over even more marketshare.

I don't think they will increase the number of SPs per SIMD 'core', not with their first 40 nm. chips and probably not even with RV870. To me it seems like it should be fairly easy for them to increase the amount of SIMD 'cores' on a chip. They increased the amount of SIMD 'cores' that RV770 would get at the last minute when they needed to fill up some extra space, so to me it seems like you don't need to do a lot of redesigning/work to increase the SIMD 'core' count. I'd say 16 SIMD 'cores' for RV790 shouldn't be too hard to do for them.
I'd like to know what they would to with their RBEs if they do put 16 SIMD 'cores' on there though, although I'm not really sure if yet if 16 RBEs would become a bottleneck.

It will simply be guesswork for us until it's launched I guess, still interesting to think about though.

[LordEC911]

I don't think they will increase the number of SPs per SIMD 'core', not with their first 40 nm. chips and probably not even with RV870. To me it seems like it should be fairly easy for them to increase the amount of SIMD 'cores' on a chip. They increased the amount of SIMD 'cores' that RV770 would get at the last minute when they needed to fill up some extra space, so to me it seems like you don't need to do a lot of redesigning/work to increase the SIMD 'core' count. I'd say 16 SIMD 'cores' for RV790 shouldn't be too hard to do for them.
I'd like to know what they would to with their RBEs if they do put 16 SIMD 'cores' on there though, although I'm not really sure if yet if 16 RBEs would become a bottleneck.

It will simply be guesswork for us until it's launched I guess, still interesting to think about though.

Keep in mind that this won't be their first 40nm chip...
Anyways, it wouldn't be much harder to add more SPs into a SIMD than to add SIMDs. Adding more SIMDs will cause a reworking of the scheduler and will cause more overhead/latency. As for the ROPs, they sorta seem to be related to the memory controllers, like Nvidia, but not directly. I don't think more ROPs is really needed right now but maybe for RV870, ROPs are large and take up a lot of bandwidth.