Sorry for the delay here, for some reason I wasn't getting e-mail notifies.

Speederlander is correct in post #18 above. The error rates are the same for both ECC/Non-ECC memory (about 1 in 10^-12 BER for the module) however this does not take into effect usage and time. The most recent study I saw was from CERN (~1300 nodes over 3 months) with a average network I/O rate of about 800MB/s contineous. (~6 memory read/write operations for each bit (read NIC->write kernel mem->read from kmem->write application mem->read app mem->write kmem file buff->read kmem filebuff->write to disk) with the vendor rating of a BER rate of 10^-12 that would be somewhere around 600,000 ECC single bit errors (which would be corrected by the ECC memory & bios) however they only had reported 44 errors in that time frame which is VERY good. However they did mention that they had a problem with the errors being reported properly by the motherboard (to the IPMI level) so they may not have seen all the errors.

@M^2: actually you don't have 24bits (the only bit-level raid is raid-2, all other parity raids are byte or block parity) which is what you're talking about, and was one of the reasons why raid-2 was dropped (that and you got the best performance when your raid-2 set had the same number of data spindles as your system's word size). The 3 'bits' was an illustration not literal, sorry for the confusion. I was trying to say that you have 3 sources of information to check the real (full data) and two different parity blocks. Each parity block can reconstruct a missing block of full data on that stripe width.