RV775XT and PRO have 840 SP?

[w0mbat]

But RV770 has only 800SPs (10*16*5) and not 840SP. U can see this on the Die-shot.

[Mats]

http://forums.vr-zone.com/showthread.php?t=289806

[Macadamia]

You're forgetting that RV770 actually has a spare unit to disable (too lazy to pick up the link, but I'm right), if the core slightly fails (840SPs, 40SPs are disabled = 800SPs). So they may have been collecting succesfull cores for RV775 and use them later on.

There are redundant (spare) SPs on RV770. There are no redundant TMUs.


Also, the die size would not change if that were the case.

[Junos]

There are redundant (spare) SPs on RV770. There are no redundant TMUs.


Also, the die size would not change if that were the case.

Yeah you're right. I knew that there weren't spare TMUs but didn't know how to call the rest 40 SPs. Thanks for fixing my post.

The die size change is very odd indeed, makes me want to doubt the numbers...

[tenebre]

that's because it's not rv770 but rv770 optimized. -read new design

[SNiiPE_DoGG]

Yeah you're right. I knew that there weren't spare TMUs but didn't know how to call the rest 40 SPs. Thanks for fixing my post.

The die size change is very odd indeed, makes me want to doubt the numbers...

that's because it's not rv770 but rv770 optimized. -read new design

you guys wanna know why there are spare TMUs where there shouldnt be?

because these specs are
F
A
K
E

[Monkeywoman]

hey they are fake, anyone can get a news site to believe them enough to post fud.

[ToTTenTranz]

The extra SPs and less transistors could easily be explained by ATI putting the redundancy down a notch (55nm should be fully mature by now).
The additional TMUs could already be there.. or could be a result of a late redesign.


The ammount of "this is fake" posts I see in this thread reminds me of when the first leaks came out about a 800SPs/40TMUs design for RV770.
Everyone likes to be the first to say "I knew from the beggining this would be a fake". Oddly, when the same people end out being wrong, I never once saw a post saying "I guess I was wrong from the beggining".



Don't forget that ATI/AMD has to actively counterattack the "GTX260 core 216 + Big Bang II" phenomena. Even more if the GT200b 55nm cards end up with higher clocks.

[Ozzfest05]

Well obviously ATI is going to release their new cards with over 512 I mean even the 4850 has a 1gb version

[LordEC911]

Fake. There is no way to make 840SPs out of RV770 architecture bases (10X8).
It's always increasing in SPs of 80, aka 320 -> 400, 800 -> 880 etc.

And for a new chip this sounds pathetically little. Fake.

Ummm... RV770 march is 10 clusters of 16 v5 shaders.
Your statement is correct, the next step would be 880 but I'm not sure how you got there with 10x8...

There are redundant (spare) SPs on RV770. There are no redundant TMUs.

Also, the die size would not change if that were the case.

Please see Wombat's post.

[SNiiPE_DoGG]

The extra SPs and less transistors could easily be explained by ATI putting the redundancy down a notch (55nm should be fully mature by now).
The additional TMUs could already be there.. or could be a result of a late redesign.


The ammount of "this is fake" posts I see in this thread reminds me of when the first leaks came out about a 800SPs/40TMUs design for RV770.
Everyone likes to be the first to say "I knew from the beggining this would be a fake". Oddly, when the same people end out being wrong, I never once saw a post saying "I guess I was wrong from the beggining".



Don't forget that ATI/AMD has to actively counterattack the "GTX260 core 216 + Big Bang II" phenomena. Even more if the GT200b 55nm cards end up with higher clocks.

yeah but more TMUs and SPs with less transistors makes no freakin sense without a process shrink.....

[LordEC911]

yeah but more TMUs and SPs with less transistors makes no freakin sense without a process shrink.....

Process shrink wouldn't decrease transistor count, only density/size of the transistor creating a smaller die.
There are quite a few things they could have removed that would cause a decrease in trannies.
UVD was one brought up in the other thread and the sideport would be the other.

[ToTTenTranz]

yeah but more TMUs and SPs with less transistors makes no freakin sense without a process shrink.....

It's happened before.
In the transition from G70 to G71, nVidia managed to put about 9% less transistors in G71, maintaining the same general design and active units.


Here we would see only a 3% less transistors from RV770 to RV775. As told above, the increase in TMUs and SPs could also be the replace for the UVD, which is apparently no longer needed.

Cutting down the sideport could compromise the performance of a dual-RV775 (R720/R780?) for computing applications.

[HKPolice]

The SP spec is fake, an extra 40 isn't worth the trouble and doesn't fit mathematically anyways. The extra TMUs are possible and the size shrink is possible too.

[zerazax]

As others ahve stated, the SP count doesn't work. However, if they went to 960 SP's, the 48 TMUs would match up properly.

As for clocks... keep in mind the 55nm process is constantly improving, and they've been on 55nm for a year now. A Rev A12 respin could probably reach clocks close to that (which, however, seems too high on 55nm - 40 nm seems possibly). Still, if they pull this off (or heck, a 950 mhz rv770) it would be one pimpin card

And as others have pointed out, die size and transistor count can decrease by taking sideport and redundancy pieces out. Also, no one believed RV770 could fit 800 SP's in that die size with < 1 billion transistors, and ATI pulled it off just fine last I checked

[Luka_Aveiro]

I think this whole RV775XT and RV775Pro rumors are nothing but bluff...

[spursindonesia]

One thing is pretty obvious to me, do we all think ATi is gonna sit tight doing nothing with their d!ck hanging while nVidia running circle around them with 55nm parts of GT200 mArch ? ATi can see it coming from miles away, that their performance crown, which is a strong HALO beacon after R600 debacle, will be gone with GT200b, will they be thrifty & stupid enough not to create/develop a worthy competitor for these nVida new aces ? After all the financial success and efficiency of their RV770 mArch ? But well, if they do have something in their sleeves, a new ace generation with 40 nm node coming SOON -early Q2 2009 soon, perhaps they will swallow this loss and compete solely on price for the next few months.

[tajoh111]

How could anyone explain how they ramp up the clocks to good liquid cooling levels without a new process?

Unless they are crazy cherry picked with the very best after market cooler, it will be impossible to reach 900 mhz(unless they are pumping incredible volts).

If these are cherry picked chips, expect quantities to be limited.

The pro could be rebadged 4870 obviously.

[Luka_Aveiro]

But well, if they do have something in their sleeves, a new ace generation with 40 nm node coming SOON -early Q2 2009 soon, perhaps they will swallow this loss and compete solely on price for the next few months.

They have done it with HD38xx series, and if they did it with HD48xx series, they wouldn't be losing much money, because AMD graphics cards have done very well since HD48xx's series debut.

And, all in all, i think everyone would like to have a cheap 1Gb HD4870

[Shintai]

40nm and RV870 is simply too close. Or even in the case. 40nm Rv770 in Q2 if we assume no RV870. It just doesnt make sense to do any addons whatever. Plus the specs shown doesnt match anything. It looks to be some random forum posters wish as usual.

If AMD gonna do anything until 40nm. It would be a simple respin only for higher clocks. But even that...for a few months on the market?

[Boissez]

This is rubbish. Effective 2800Mhz GDDR3 on a high, yet still midrange part? There are so many uneducated guesses in this table it's ridiculous!

... must be GDDR4 then.

[Voodoo²]

RV670

4 SIMD cores * 16 modules * 5 Alus (4+1) = 320 sp
4 TMU per SIMD unit = 16 TMUs

RV770

10 SIMD cores * 16 modules * 5 Alus (4+1) = 800 sp
4 TMU per SIMD unit = 40 TMUs

RV775 ???

12 SIMD cores * 14 modules * 5 Alus (4+1) = 840 sp
4 TMU per SIMD unit = 48 TMUs

or

6 SIMD cores * 28 modules * 5 five Alus (4+1) = 840 sp
8 TMU per SIMD unit = 48 TMUs

I think is fake cause the 512MB doesn´t look good but the math is doable. I don´t know much about GPU´s and their internal structures and how they work but maybe if RV775 is true is just a rearrengement of this structures too make it easier to program and to make it more efficient.

[Helmore]

RV670

4 SIMD cores * 16 modules * 5 Alus (4+1) = 320 sp
4 TMU per SIMD unit = 16 TMUs

RV770

10 SIMD cores * 16 modules * 5 Alus (4+1) = 800 sp
4 TMU per SIMD unit = 40 TMUs

RV775 ???

12 SIMD cores * 14 modules * 5 Alus (4+1) = 840 sp
4 TMU per SIMD unit = 48 TMUs

or

6 SIMD cores * 28 modules * 5 five Alus (4+1) = 840 sp
8 TMU per SIMD unit = 48 TMUs

I think is fake cause the 512MB doesn´t look good but the math is doable. I don´t know much about GPU´s and their internal structures and how they work but maybe if RV775 is true is just a rearrengement of this structures too make it easier to program and to make it more efficient.

RV670 and RV770 can't be compared as they are quite different in the way their internal structure is build up. On RV770 the shader SIMD cores and the TMU units (quads) are tied to each other, but on RV670 this was not the case and the TMU units where shared between shader unit clusters from all 4 SIMDs. Also the option with 12 SIMD units and 14 modules is not really feasible as far as I know, because you should be able to divide it by 4 as the SIMD unit has to work on pixel quads. I'm not really sure about though, but all their current design only have 8 or 16 modules per SIMD and I don't think they'll deviate from that (so we can also scrap the 6 SIMD version). Unless this is a completely new chip and that doesn't seem to be the case.

To me it all looks to be fake, although I don't think AMD won't release anything in Q1 of 2009. My guess is that we might see RV740 before the end of Q1.

[Boissez]

RV670

4 SIMD cores * 16 modules * 5 Alus (4+1) = 320 sp
4 TMU per SIMD unit = 16 TMUs

RV770

10 SIMD cores * 16 modules * 5 Alus (4+1) = 800 sp
4 TMU per SIMD unit = 40 TMUs

RV775 ???

12 SIMD cores * 14 modules * 5 Alus (4+1) = 840 sp
4 TMU per SIMD unit = 48 TMUs

or

6 SIMD cores * 28 modules * 5 five Alus (4+1) = 840 sp
8 TMU per SIMD unit = 48 TMUs

I think is fake cause the 512MB doesn´t look good but the math is doable. I don´t know much about GPU´s and their internal structures and how they work but maybe if RV775 is true is just a rearrengement of this structures too make it easier to program and to make it more efficient.

If (big if) those rumours are true I would guess that ATI would choose to add more regular ALU's to each stream processing unit (let's say 6 instead of 4) the math would then be something like:
12 SIMD cores*10 modules*7 ALUs(6+1)= 840SP

We'd a get larger but simpler SPU's giving a smaller footprint and clocking higher - makes sense no?

[zanzabar]

they wouldent add more scalers (or alu) thats their week point, and changing the module count would mean that they would need to change the memory buss