Some have speculated that given the phenom underlining architecture is the same in Phenom II that you would see high current leakage as you overclocked to 4.0. On the XS AMD forum, RiverRicer found HERE that there are significant architecture changes in AMD's 45nm chip.
The transistor drive current for AMD's 45-nm devices is much lower than that of the Intel HKMG transistors. But power consumption is quickly becoming a high priority for server chips. AMD's transistors exhibit very low channel leakage. Our transistor benchmarks indicates that leakage current is less than one-third of the value measured on AMD's 65-nm process. It's also significantly lower than the Intel 45-nm HKMG process. In fact the Ion/Ioff ratio for AMD's PFET is nearly 10 times better than that for the Intel PFET.
The above would seem to imply that should AMD migrate to HKMG (High_K_Metal_Gates) you would see still more improvement. HKMG is forecast for AMD chip construction later in 2009.

In my opinion, this technology innovation would seem to suggest that later Phenom II chips could clock well above 4.0Ghz.

For those of you technically inclined, here is an explanation of the specific design innovations:

On the NFET side, stress memorization stretches the n-channel, which is enhanced later in the process flow by the addition of a nitride tensile stress liner. The liner itself is scaled down at 45 nm to ensure the required strain is adequately supplied to the transistor channel to enhance electron mobility and subsequently increase the drive current. The gate-stack design is modified as well, with a new sidewall spacer design for 45nm.

The PFET performance improvement is more dramatic with drive current now up to 660 µA/µm compared with 510 µA/µm on 65-nm transistors. Again, this increased output current is the result of optimized compressive strain for the p-channel device. The new design of the PFET moves the embedded silicon-germanium source/drain regions closer to the channel to maximize the transfer of stress, thereby increasing hole mobility. Although shorter gate lengths are not driving the improvements, it is a reduction in dimensions that allows increased channel stress to provide the performance scaling. AMD 45-nm PFET design reduces the space from embedded silicon-germanium to the channel edge by half.