Deneb just around the corner?

[ryboto]

Does anybody know the overall speed increase of C2D over Barcelona clock for clock? I know I am making a very rough estimate, but I'd like to put some kind of numbers in my head.

There was a thread about this a while back..someone did a Q6600 up against a 9950, or 9850, can't remember, but clock-for-clock, the Q6600 had an average 5% advantage. This was over a wide range of games/benchmarks.

[charged3800z24]

There was a thread about this a while back..someone did a Q6600 up against a 9950, or 9850, can't remember, but clock-for-clock, the Q6600 had an average 5% advantage. This was over a wide range of games/benchmarks.

"Source Techreport.com"
On a game where Multi core is a plus.. the 9750 (2.4ghz) best the q6600, but in the other screenies.. you can see the 9950 has a swap of performace lead with the 65nm Intel..and it has a 200mhz advantage..So Deneb will need a good bit of improvement to best 45nm Intel..But I can see this being easier to do since it will finally have enough cache to help.

[ryboto]

"Source Techreport.com"
On a game where Multi core is a plus.. the 9750 (2.4ghz) best the q6600, but in the other screenies.. you can see the 9950 has a swap of performace lead with the 65nm Intel..and it has a 200mhz advantage..So Deneb will need a good bit of improvement to best 45nm Intel..But I can see this being easier to do since it will finally have enough cache to help.

I wasn't referring to a review site, I was referring to the work a user here did. He collected a bunch of benchmark results, compiled the results, in the end, clock for clock, there was a 5% difference overall.

edit: and games don't tell the whole story.

[charged3800z24]

I wasn't referring to a review site, I was referring to the work a user here did. He collected a bunch of benchmark results, compiled the results, in the end, clock for clock, there was a 5% difference overall.

edit: and games don't tell the whole story.

I know.. I was showing that in games where scaling is involved the phenom was on top.. but other wise is wasn't.. Deneb will need to pick up some serious ground to complete with 45nm Intel....You can also look at the chart and see in those games..The 45nm Intel chips had a good boost over the 65nm...although cache siaze etc play a role, but nothing is breath taking.. Deneb will need a lil more boost.. and hopefully those other imporvements being discussed here and there, will be enough to help get there.

[YukonTrooper]

Wow, I never realized the Yorkies were so far ahead of the Q6600. I'm thinking we'll see Shanghai/Deneb come in between Kentsfield and Yorkfield. I refuse to believe that the new chips will be slower than Intel's first generation Core2 chips.

[roofsniper]

Oh man you just made my day ,that was soo funny
AMDzone is in for a ride .

Anyhow i searched the spec.org for any newer additions on the SH Opterons and had no luck .Maybe the other results will come on the night of the official launch(next Wednesday).

Edit: found an interesting article on the project Ridgeback design cycle.Ridgeback is internal AMD code name for Shanghai

http://www.statesman.com/business/co...0shanghai.html

woot my local paper. ill go read the print version

[roofsniper]

just read that article in the newspaper and it sounds like amd is pretty confident in their new chip and thinks it will succeed. i keep hearing them say that it has exceeded their expectations which makes me think that it will be good.

[demonkevy666]

http://www.fudzilla.com/index.php?op...0372&Itemid=35

according to them it's slower then a york field....


I doubt that it is. ( my 2 cents)

[informal]

FUD has covered all the angles(slower,faster,equal).Don't pay much attention to it.In the end,FUD is always right-look at the first sentence

[YukonTrooper]

http://www.fudzilla.com/index.php?op...0372&Itemid=35

according to them it's slower then a york field....


I doubt that it is. ( my 2 cents)

If AMD says Shanghai is 20% faster than Barcelona overall (which is probably generous, considering all companies beef up their numbers), then it might just be slower than Yorkfield. Of course, it will likely do better in some benchmarks and worse in others, as that's just the way it always goes. Let's hope that it's at least on par with Yorkfield, and that AMD can release it at a competitive price, because I need to upgrade my Conroe rig, which is getting long in the tooth.

[iocedmyself]

http://www.theregister.co.uk/2008/11...ghai_partners/

the most interesting bit of that article being:

Back in September, AMD said that with higher clock speeds and tweaks in the instruction stream, Shanghai chips would deliver somewhere between 15 and 30 per cent more performance compared to equivalent Barcelona chips. And then it hedged and said customers should expect around a 20 per cent boost for an average workload. On a conference call with tier-two system vendors today, Burke Banda, product marketing manager for AMD's Server and Workstation Division, said that early tests by system vendors showed Shanghai delivering about 35 per cent more performance and that the newer chips consumed about 30 per cent less power.

Now, while i haven't had hands on time with the Shanghi/Denub, being a blood relative of one of the top AMD bigwigs that has gotten to play with the chips is good enough for me. Yeah, those numbers are acurate, probably lowballed a bit just to be safe. So I7 and $600-$1000 or so it would cost to get a low end chip that won't give much performance gain as well as power consumption i think i recently saw over current quads...well the only thing funnier will be 6 months later when intel puts another socket out....that needs new ram, cpu and possibly heatsink.

Yes AMD is putting out 3.5ghz chips with low TDP and headroom to OC.
Yes the the aircooled 4.3ghz OC was real. Yes it was done with a midsized heatsink only topping out at 55c at 100% extended continous load. I believe 4.6 or 4.7 was hit by setting the voltage to nuclear but with that heat sink was in the mid 60's somewhere and unstable...but not 100% on the specifics there but are in that area....

no, it isn't just a die shrink, you don't get an gain 1000-2000mhz clock speed while dropping power consumption from a die shrink.

C2Q benched better in 32bit apps, where they were right in line with the 9600 or 9700 phenoms, which are 64bit chips. Some may have noticed that when you bench the 64bit chips in 64bit apps....their performance jumps in the realm of 10-20%.over 32bit numbers

I really don't care if AMD can take the performance crown back, its a small fraction of the market. They are getting some server clout back, and we will be able to go back to buying cheap AMD chips, and doubling the clock speed to beat out FX chips =P.

But let the baseless arguments commence =D

[roofsniper]

the thing that sets shanghai apart from i7 is power consumption and use of the old socket. you can tack on some more cash onto i7 for having to buy new mobos and ontop of that i believe they use around double the power of the shanghai chips (can't be certain). plus amd has been doing this for awhile(memory controller, hyper transport) and i think i7 might have a few glitches a bugs. so even if shanghai/deneb aren't the highest performing chips they got every other standpoint covered.

[YukonTrooper]

so even if shanghai/deneb aren't the highest performing chips they got every other standpoint covered.

Well, we don't know that quite yet, because the chip isn't even released.

[Doctor Pepper]

...Yeah, those numbers are acurate, probably lowballed a bit just to be safe... =D

This was by far the most interresting I have read in this subject

And since I am a born romantic I chose to believe every word of it!!!

[Rammsteiner]

plus amd has been doing this for awhile(memory controller, hyper transport) and i think i7 might have a few glitches a bugs.

Hmmm, not so sure.

It's certainly true that AMD has like the 'experience' with HT and IMC's after those years of using it. So the chance for AMD to mess something up around either of those is very small, and with every new stepping/core/platform the chance becomes a lot smaller.

On the otherhand, HT and IMC's ain't like a secret thing. Ive no clue how it's build in, how it's different from MC's on the motherboard etc. I think the main issue for making that step is chosing the right moment. For example, Intel would have been stupid to do something like this while they were in the middle of X38 days and simply have mixed systems etc. It takes a complete new platform to introduce both HT/QPI and IMC's. It's possible Intel has some bugs and flaws in its design, but to be honest, that chance is pretty small since MC's in general are only having a risk of flaws when a new memory type is being used for the first time (DDR2, DDR3 etc). And HT/QPI, I dont think that's such a miracle thing. As said, it takes the right moment and of course a bit of engineering, but in the end it's just about optimizing FSB, or making it more efficient, mainly because 7 years ago we wouldnt even need such bandwiths.

Just my guess though

[Nedjo]

It's possible Intel has some bugs and flaws in its design, but to be honest, that chance is pretty small since MC's in general are only having a risk of flaws when a new memory type is being used for the first time (DDR2, DDR3 etc). And HT/QPI, I dont think that's such a miracle thing.

Well one thing is curious... ATM only two QPI controllers work in Nehalem... thus why 4/8-way Nehalem solution is scheduled for Q3 2009...

With HT AMD had fully working 4/8-way solution from day one!

[Jazzman]

On the otherhand, HT and IMC's ain't like a secret thing. Ive no clue how it's build in, how it's different from MC's on the motherboard etc. I think the main issue for making that step is chosing the right moment. For example, Intel would have been stupid to do something like this while they were in the middle of X38 days and simply have mixed systems etc. It takes a complete new platform to introduce both HT/QPI and IMC's. It's possible Intel has some bugs and flaws in its design, but to be honest, that chance is pretty small since MC's in general are only having a risk of flaws when a new memory type is being used for the first time (DDR2, DDR3 etc). And HT/QPI, I dont think that's such a miracle thing. As said, it takes the right moment and of course a bit of engineering, but in the end it's just about optimizing FSB, or making it more efficient, mainly because 7 years ago we wouldnt even need such bandwiths.

Just my guess though

Based on Nehalem overclocking results in some reviews, I think it does have some design flaws/inefficiency that causes 80C to 100C temps. Maybe it's the hardware or microcode but it definitely appears to be an issue.

Being a newbie with AMD, my understanding of AMD history is poor. I seem to recall that early AMD chips had very high temp problems when overclocked. Could be Intel has to go through the same pain for a while?

Demonkevy666 posted this url about the Nehalem temp issue on the other Deneb thread: HERE