How to set up GTL Ref Values for 45nm & 65nm

[CryptiK]

Overclocking by increasing voltages and speeds obviously alters the optimization of the circuits (which are tuned for stock speeds). Increasing voltage changes the impedance of the circuit and the amount of noise that is present, such that the more voltage that is added, the more noise that is generated. The result of this is an increase of overshoot, ringback and settling time. To try and compensate for this, we can adjust Vtt and the GTL Refs, while using the minimum possible vcore to keep noise as low as possible, and also choosing FSB ranges that are within a small margin (around +/- 15 MHz) of multiples of the cpu clock 33.33MHz. Mikey mentioned these settings earlier. You will find that when you keep within the small window around each optimal FSB frequency, that Vtt, and GTL's can be reduced to close to normal levels, while setting FSB frequencies outside these windows causes the need for markedly different Vtt and GTL settings, far from the stock values.

The goal isn't to end up with the same GTL Ref you started with, it can just sometimes end up that way by chance. You have to simply find GTL ref settings that keep V(IH) and V(IL) withing their respective operational parameters for the given FSB, clock, and Vtt. I just suggested that people set those values (45nm = 0.635x and 65nm = 0.667x) initially to start with, and tweak from there until the optimal values are found for whatever FSB/clock/Vtt you have set. Personally the optimal setting has been a little over 0.667x when using a Vtt of ~1.16v, and around 0.635x or less when using a Vtt of ~1.22v. Some people, especially with quads, seem to benefit when increasing the Vtt and the GTL Refs, it really just depends on your individual CPU. You will probably find the optimal settings to be between 0.61x and 0.70x.

Concerning the GTL Ref 0/2 = 0.63x and 1/3 = 0.67x on the P5Q-D, I can't really suggest a reason why this would be so, unless it was optimized for dual core operation ie: keeping the address bus GTL Ref higher than the data bus. (More advanced bioses allow more control over the GTL Refs allows each GTL Ref 0/1/2/3 to be set individually and this is more suited to quad core GTL Ref tuning.) However even though I used a dual on the P5Q-D, I found that by setting the 0/2 GTL Ref to 0.67x when using a low Vtt increased my stability.