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Thread: DFI first DDR3 motherboard, UT X48-T3R Heatsink by Thermalright

  1. #126
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    Quote Originally Posted by karlpox View Post
    yep just borrowed his rams (ocz reaperx 2x2gb ddr3-1333) but still doesnt work. any other options on what i can with my problem??
    You need ram that will not boot at CAS 7 from the SPD. The ReaperX boots at CAS 7.

  2. #127
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    Quote Originally Posted by Clunk View Post
    Here


    the last run was just to see how high it would go with the 9.5 multi at 1:2. I was hoping to get to 500/2000 but i was just short of that at 488/1952.

    Going to try with a lower multi and see what I can get
    That's some excellent work Clunk! I hope when my phase system is completed, that you'll help me out with my 9770 and OCZ Flex II 8-8-8 kit on this mobo...I believe it's the same memory as the Platinum EB that you used but since it has better cooling, they released it with a tighter timing...I wonder if 2.1ghz would be possible with water cooling on the memory.
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  3. #128
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    Thanks

    Not sure about the memory yet, not managed to hit the rated speed with any stability yet, so can't comment there.

    I just wish they would hurry up with a 500fsb+-enabled-non-alpha-publically-available-BIOS so I can move on with the review

  4. #129
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    @karl

    Hows the Hotflashed BIOS chip? Hot flashing really comes in handy. hehehe Hope you enjoy your new toy.


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  5. #130
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    New BIOS if anyone is in need.

  6. #131
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    LP UT X48-T3RS, E8400, 480x8.5, ReaperX 1333MHz, Post 1 Of 3

    E8400
    DFI LP UT X48-T3RS, 06/09 BIOS
    480x8.5, Memory 1600MHz
    2x2GB OCZ PC3-10666 1333MHz ReaperX
    XFX8800 GTS (G92)
    tRD - 8.5, Memset Misreads The Value When Set Manually
    Memory Speed - 1600MHZ, CPU-Z Misreports The Divider
    Yellow Slots Used For Memory


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    Code:
    CPU Feature Page
    Thermal Management Control................Enabled
    PPM (EIST) Mode...........................Disabled
    Limit CPUID MaxVal........................Disabled
    CIE Function..............................Disabled
    Virtualization Technology.................Disabled
    Core Multi-Processing.....................Enabled
    
    Main BIOS Page
    Exist Setup Shutdown......................Mode 2
    Shutdown After AC Loss....................Disabled
    O. C. Fail Retry Counter..................0
    CLOCK VC0 Divider.........................Auto
    CPU Clock Ratio...........................8.5x
    CPU N/2 Ratio.............................Enabled
    CPU Clock.................................480 MHz
    Boot Up Clock.............................Auto
    CPU Clock Amplitude.......................800mV
    CPU Clock0 Skew...........................0ps
    CPU Clock0 Skew...........................0ps
    DRAM Speed................................400/1333
    PCIE Clock................................100MHz
    PCIE Slot Config..........................1X 1X
    
    CPU Spread Spectrum.......................Disabled
    PCIE Spread Spectrum......................Disabled
    SATA Spread Spectrum......................Disabled
    
    Voltage Setting Page 
    CPU VID Control...........................1.34375V
    CPU VID Special Add Limit.................Enabled
    CPU VID Special Add.......................Auto
    DRAM Voltage Control......................1.837V
    SB Core/CPU PLL Voltage...................1.510V
    NB Core Voltage...........................1.543V
    CPU VTT Voltage...........................1.144V
    VCore Droop Control.......................Disabled
    Clockgen Voltage Control..................3.45V
    GTL+ Buffers Strength.....................Strong
    Host Slew Rate............................Weak
    GTL REF Voltage Control...................Disabled
    CPU GTL 1/2 REF Volt......................113
    CPU GTL 0/3 REF Volt......................100
    North Bridge GTL REF Volt ................100
    
    DRAM Timing Page
    Enhance Data Transmitting.................Fast
    Enhance Addressing........................Fast
    T2 Dispatch...............................Disabled
    Clock Setting Fine Delay..................Listed Below
    CAS Latency Time (tCL)....................7
    RAS# to CAS# Delay (tRCD).................6
    RAS# Precharge (tRP)......................6
    Precharge Delay (tRAS)....................20
    All Precharge to Act......................Auto
    REF to ACT Delay (tRFC)...................Auto
    Performance Level.........................9
    Read Delay Phase Adjust...................Listed Below
    MCH ODT Latency...........................Auto
    Write to PRE Delay (tWR)..................Auto
    Rank Write to Read (tWTR).................Auto
    ACT to ACT Delay (tRRD)...................Auto
    Read to Write Delay (tRDWR)...............Auto
    Ranks Write to Write (tWRWR)..............Auto
    Ranks Read to Read (tRDRD)................Auto
    Ranks Write to Read (tWRRD)...............Auto
    Read CAS# Precharge (tRTP)................Auto
    ALL PRE to Refresh........................Auto
    
    Read Delay Phase Adjust Page
    Channel 1 Phase 0 Pull-In.................Enabled
    Channel 1 Phase 1 Pull-In.................Enabled
    Channel 1 Phase 2 Pull-In.................Enabled
    Channel 1 Phase 3 Pull-In.................Enabled
    Channel 1 Phase 4 Pull-In.................Enabled
    
    Channel 2 Phase 0 Pull-In.................Auto
    Channel 2 Phase 1 Pull-In.................Auto
    Channel 2 Phase 2 Pull-In.................Auto
    Channel 2 Phase 3 Pull-In.................Auto
    Channel 2 Phase 4 Pull-In.................Auto
    
    Clock Setting Fine Delay Page
    DRAM Default Skew Model...................Model 3
    
    Fine Delay Step Degree....................5ps
    
    
    Ch1 Clock Crossing Setting................Auto
    DIMM 1 Clock fine delay...................Current 489ps
    DIMM 2 Clock fine delay...................Current 489ps
    DIMM 1 Control fine delay.................Current 434ps
    DIMM 2 Control fine delay.................Current 473ps
    Ch 1 Command fine delay...................Current 205ps
    
    Ch2 Clock Crossing Setting................Auto
    DIMM 3 Clock fine delay...................Current 686ps
    DIMM 4 Clock fine delay...................Current 686ps
    DIMM 3 Control fine delay.................Current 607ps
    DIMM 4 Control fine delay.................Current 654ps
    Ch 2 Command fine delay...................Current 182ps
    
    Ch1Ch2 CommonClock Setting................Auto
    
    Ch1 RDCAS GNT-Chip Delay..................Auto
    Ch1 WRCAS GNT-Chip Delay..................Auto
    Ch1 Command to CS Delay...................Auto
    
    Ch2 RDCAS GNT-Chip Delay..................Auto
    Ch2 WRCAS GNT-Chip Delay..................Auto
    Ch2 Command to CS Delay...................Auto
    
    Common CMD to CS Timing...................Auto
    Last edited by Praz; 06-22-2008 at 01:23 PM.

  7. #132
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    LP UT X48-T3RS, E8400, 480x8.5, ReaperX 1333MHz, Post 2 Of 3

    XP SP3


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  8. #133
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    LP UT X48-T3RS, E8400, 480x8.5, ReaperX 1333MHz, Post 3 Of 3

    Vista 64 Bit SP1


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  9. #134
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    Max FSB? Nice bench's

  10. #135
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    Quote Originally Posted by quake6 View Post
    Max FSB? Nice bench's
    Thanks. Don't know about the FSB yet. Haven't even had any 1x2GB sticks in it. Testing a couple more 2x2GB sets then will find out what it can do with 8GB. After that will look at 1x2GB and max FSB. The BIOS is still being tuned also. Oskar is sending several alphas versions each say. The above screenshots were done with an official version.

  11. #136
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    Great work Praz, thanks for posting! I had to keep remembering that your running 2 x 2GB moduls, not 2x 1GB! With that said very impressive results! I'm curious about your "Read Delay Phase Adjust" settings. I've yet to play with them much and when I have I couldn't notice any significant benchmark results or stability results. Is there any chance you would share why you ended up changing all the "Channel 1" settings to "Enabled", was it for stability or performance? Also in the BIOS screenshots you posted it looks like you have "T2 Dispatch" setting set to Disabled, but in your BIOS Settings Code you have it listed as "Auto". For the results you have posted did you have the BIOS "T2 Dispatch" setting set to "Disabled" or "Auto". Thanks again Praz for your help! Like you I'm still working with 06/09, although I've tried a couple of the new Beta's released recently.
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    HEAT

  12. #137
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    Fixed T2 Dispatch. With 2x2GB sticks it needs to be disabled. Depending on speed, both Enhance Data Transmitting and Enhance Addressing may also have to be set to Disabled. Everest shows a gain with tRD set at 8 1/2 compared to 9. The board can do a straight 8 but it requires quite a bit of increase to NB voltage to hold stability.

  13. #138
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    LP UT X48-T3RS, E8400, 500x8, Platinum EB 1600MHz, Post 1 Of 3


    DFI LP UT X48-T3RS, 06/09 BIOS
    E8400
    500x8, Memory 1666MHz
    2x2GB OCZ PC3-12800 1600MHz Platinum EB
    XFX8800 GTS (G92)
    tRD - 8.5, Memset Misreads The Value When Set Manually
    Memory Speed - 1666MHZ, CPU-Z Misreports The Divider
    Yellow Slots Used For Memory


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    Code:
    CPU Feature Page
    Thermal Management Control................Enabled
    PPM (EIST) Mode...........................Disabled
    Limit CPUID MaxVal........................Disabled
    CIE Function..............................Disabled
    Virtualization Technology.................Disabled
    Core Multi-Processing.....................Enabled
    
    Main BIOS Page
    Exist Setup Shutdown......................Mode 2
    Shutdown After AC Loss....................Disabled
    O. C. Fail Retry Counter..................0
    CLOCK VC0 Divider.........................Auto
    CPU Clock Ratio...........................8x
    CPU N/2 Ratio.............................Disabled
    CPU Clock.................................500 MHz
    Boot Up Clock.............................Auto
    CPU Clock Amplitude.......................800mV
    CPU Clock0 Skew...........................0ps
    CPU Clock0 Skew...........................0ps
    DRAM Speed................................400/1333
    PCIE Clock................................100MHz
    PCIE Slot Config..........................1X 1X
    
    CPU Spread Spectrum.......................Disabled
    PCIE Spread Spectrum......................Disabled
    SATA Spread Spectrum......................Disabled
    
    Voltage Setting Page 
    CPU VID Control...........................1.31255V
    CPU VID Special Add Limit.................Enabled
    CPU VID Special Add.......................Auto
    DRAM Voltage Control......................1.855V
    SB Core/CPU PLL Voltage...................1.510V
    NB Core Voltage...........................1.630V
    CPU VTT Voltage...........................1.325V
    VCore Droop Control.......................Disabled
    Clockgen Voltage Control..................3.45V
    GTL+ Buffers Strength.....................Strong
    Host Slew Rate............................Strong
    GTL REF Voltage Control...................Disabled
    CPU GTL 1/2 REF Volt......................113
    CPU GTL 0/3 REF Volt......................100
    North Bridge GTL REF Volt ................100
    
    DRAM Timing Page
    Enhance Data Transmitting.................Fast
    Enhance Addressing........................Fast
    T2 Dispatch...............................Disabled
    Clock Setting Fine Delay..................Listed Below
    CAS Latency Time (tCL)....................7
    RAS# to CAS# Delay (tRCD).................6
    RAS# Precharge (tRP)......................6
    Precharge Delay (tRAS)....................20
    All Precharge to Act......................Auto
    REF to ACT Delay (tRFC)...................Auto
    Performance Level.........................9
    Read Delay Phase Adjust...................Listed Below
    MCH ODT Latency...........................Auto
    Write to PRE Delay (tWR)..................Auto
    Rank Write to Read (tWTR).................Auto
    ACT to ACT Delay (tRRD)...................Auto
    Read to Write Delay (tRDWR)...............Auto
    Ranks Write to Write (tWRWR)..............Auto
    Ranks Read to Read (tRDRD)................Auto
    Ranks Write to Read (tWRRD)...............Auto
    Read CAS# Precharge (tRTP)................Auto
    ALL PRE to Refresh........................Auto
    
    Read Delay Phase Adjust Page
    Channel 1 Phase 0 Pull-In.................Enabled
    Channel 1 Phase 1 Pull-In.................Enabled
    Channel 1 Phase 2 Pull-In.................Enabled
    Channel 1 Phase 3 Pull-In.................Enabled
    Channel 1 Phase 4 Pull-In.................Enabled
    
    Channel 2 Phase 0 Pull-In.................Auto
    Channel 2 Phase 1 Pull-In.................Auto
    Channel 2 Phase 2 Pull-In.................Auto
    Channel 2 Phase 3 Pull-In.................Auto
    Channel 2 Phase 4 Pull-In.................Auto
    
    Clock Setting Fine Delay Page
    DRAM Default Skew Model...................Model 3
    
    Fine Delay Step Degree....................5ps
    
    
    Ch1 Clock Crossing Setting................Auto
    DIMM 1 Clock fine delay...................Current 489ps
    DIMM 2 Clock fine delay...................Current 489ps
    DIMM 1 Control fine delay.................Current 434ps
    DIMM 2 Control fine delay.................Current 473ps
    Ch 1 Command fine delay...................Current 560ps
    
    Ch2 Clock Crossing Setting................Auto
    DIMM 3 Clock fine delay...................Current 686ps
    DIMM 4 Clock fine delay...................Current 686ps
    DIMM 3 Control fine delay.................Current 607ps
    DIMM 4 Control fine delay.................Current 654ps
    Ch 2 Command fine delay...................Current 639ps
    
    Ch1Ch2 CommonClock Setting................Auto
    
    Ch1 RDCAS GNT-Chip Delay..................Auto
    Ch1 WRCAS GNT-Chip Delay..................Auto
    Ch1 Command to CS Delay...................Auto
    
    Ch2 RDCAS GNT-Chip Delay..................Auto
    Ch2 WRCAS GNT-Chip Delay..................Auto
    Ch2 Command to CS Delay...................Auto
    
    Common CMD to CS Timing...................2N

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  14. #139
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    LP UT X48-T3RS, E8400, 500x8, Platinum EB 1600MHz, Post 2 Of 3

    XP SP3


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  15. #140
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    LP UT X48-T3RS, E8400, 500x8, Platinum EB 1600MHz, Post 3 Of 3

    Vista 64 Bit SP1


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  16. #141
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    Nice results! I should have forked out the extra few dollars for this board instead of my DK x38.

  17. #142
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    nice...!!! i want one but i want to wait for the x58 tr3
    Quote Originally Posted by skinnee View Post
    No, I think he had a date tonight...

    He and his EK Supreme are out for a night on the town!

  18. #143
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    Thanks guys. Some OCZ 1600EB 2x1GB sticks using the 06/09 BIOS. Just a quick run to get some base settings.


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  19. #144
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    So, this board will not boot, out of the box, with the Corsair 1600C7DHX ?
    Intel i7 920 d0 @ 4410MHz @ 1.36v :: Prolimatech Mega Shadow :: Gigabyte EX58-UD5 F9K :: 6GB Mushkin XP3-15000 :: HIS 5870 :: Corsair 1000W :: HannsG 27.5" :: Lian Li V1010B

  20. #145
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    Quote Originally Posted by AriciU View Post
    So, this board will not boot, out of the box, with the Corsair 1600C7DHX ?
    It depends on what the SPD is programmed to boot at not the actual rating of the ram.

  21. #146
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    I see. I would greatly appreciate for anyone that's using that ram to check the SPD ratings. It would suck to spend ~400EUR and just look at the damn box.
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  22. #147
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    Ask Corsair what CAS value the ram will boot with.

  23. #148
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    Just sent them an email. Maybe DFI will address that issue though untill the 8th when i will probably buy the motherboard.
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  24. #149
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    The issue is already addressed, The 06/09 and later BIOS' will boot regardless of ram used. But there are still some boards for sale with an older BIOS.

  25. #150
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    is it just the x48 tr3 that has those thermalright heatsinks?

    how about the x48 tr2?
    Quote Originally Posted by skinnee View Post
    No, I think he had a date tonight...

    He and his EK Supreme are out for a night on the town!

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