How Intel Will Lock Overclocking on LGA1160 (Mainstream Nehalem) - Fud

[Blauhung]

First off this is not the position of the company, only my personal feelings, but....

there isn't really any bus on the Lynnfield or Havendale chipsets, only the interface to the southbridge. Everything is on the package and that is all locked to where it's set at. The reason for the in package PLL is most likely because the clock generation and splitting can now all be done on die which makes for far more control over the process and less part compatibilities to worry about. The second PLL probably just sets speeds for the SB and all the other IC's on the board that need clock generation. This is not a change that is there to lock out overclocking, that is a side effect of the new platform structure.

Second, Intel is not ditching enthusiasts, they have devoted a platform specifically for them.