That was written using datasheet information for 771 pin processors. Intel used separate data and address GTLREF voltages on those processors. It appear from the limited amount of information available that starting with 775 pin (P4) processors a single GTLREF voltage was used for the data and address bus.
The 775 pin processor configuration goes like this. 1 core, 1 GTLREF voltage. 2 cores, 2 GTLREF voltages. 4 cores, 4 GTLREF voltages.




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