E8400/8500 degradation myth possibly busted?

[dnottis]

That's good to know that it didn't do anything to yours. I had read the same thing at the OCX site about PLL possibly causing damage, but I don't think anyone knows exactly how much will do it. The Intel e8 spec says 1.55v max for PLL but there's probably still some head room over that.

My comment about the bioses was more in general. The fact that the PLL & VTT (fsb term) voltage ranges never changed from 65nm to 45nm seems weird. People are bound to assume that the bottom settings are low.

Well the max suggested is 1.7v PLL max for 45NM duals and 1.6v PLL for quads. Stock is 1.5, the next jump is 1.6v on my board. I gave mine 1.6v, the first jump from stock.

Here was the quote I found on OCforums from OPB -

OVP/OCP Feature on Mobo is more important these days.and...dont use pll > 1.6v on quad , 1.7v on dual. (45nm )


Actually on my P5k when I select those settings it shows the min and max for 45 and 65nm settings. The new bioses that supports 45nm bioses will detect and adjust accordingly.