what exactly does the aod yellow green red setting change?![]()
what exactly does the aod yellow green red setting change?![]()
hard to say as the change with 1.1 bios is negligible. which doesn't have the tlb patch.
1.22 bios sucks, do not use it!
*edit* switched back to 113 bios. getting 1300KB/s in winrar benchmark now![]()
Last edited by blargman; 12-30-2007 at 05:31 AM.
Phenom 9500 @ 2366MHZ
2 x 2GB Geil PC2-8500 DDR2
2 x Sapphire 3870
MSI K9A2 Platinum
2 x WD Raptor 150GB
LG FP246 24" WS LCD @ 1920x1200
2 x Hitach 1TB Sata
1 x LG 18x DVD-RW
Vista SP1 / RC1
Well i get 1706Kb/s with my Phenom @2503 on 113beta but on Vista x32. Will this make a difference?
113beta has no tlb patch applied so no.
Phenom 9500 @ 2366MHZ
2 x 2GB Geil PC2-8500 DDR2
2 x Sapphire 3870
MSI K9A2 Platinum
2 x WD Raptor 150GB
LG FP246 24" WS LCD @ 1920x1200
2 x Hitach 1TB Sata
1 x LG 18x DVD-RW
Vista SP1 / RC1
I was refering between running Xp and Vista as the others are getting higher speeds.
XP will get better perf. Swanie, than in Vista. Yep.
WinRAR depends on IMC speed quite a lot. My 2.5GHz CPU/high IMC/low DDR is the same as 2.85GHz CPU/low IMC/high DDR. Max I had is around 2,245KB/s
I took a look on the linux tlb patch.
This is the msr related part.
MSR_K8_HWCR is 0xC0010015, so the patch does the same to disable the bios fix.if ((c->x86 == 0x10) && (c->x86_model < 3) && (c->x86_mask != 3)) {
/* re-enable TLB caching if BIOS disabled it */
rdmsrl(MSR_K8_HWCR, value);
value &= ~(1UL << 3);
wrmsrl(MSR_K8_HWCR, value);
rdmsrl(0xC0011023, value);
value &= ~(1UL << 1);
wrmsrl(0xC0011023, value);
/* enable OS workaround */
e298_bug = 1;
printk(KERN_INFO "AMD erratum 298 workaround enabled\n");
}
But it also sets bit nr 1 in the 0xc0011023 register.
That is called the Bus Unit configuration register and the bits 47:0 are labeld as reserved in the k10 bios developers doc.
Anyway, if the last number is 0h the patch is not applied if it's 2h the patch is applied.
Results
Both fixes enabled:
Only first(tlb) fix removed:
Only second fix removed:
Both fixes removed:
Note: I had two cores disabled and 10x cpu multi because of some k8 vs. k10 comparison, it's no kuma es.![]()
If i start AOD it is in yellow state.
If i put it in red state both fixes are removed. If i put it in black state both are applied. The yellow state shows the same value as the red state after modifying via AOD and the same values as the black state before AOD's modification.
Another note, actualy each core has this msr registers, i gained ~80 points applying the firts fix to all four cores instead of just the first one.
Last edited by justapost; 01-10-2008 at 06:43 PM.
Linux Kernel patch doing the same as the CrystalCPU method.
diff --git a/arch/x86_64/kernel/setup.c b/arch/x86_64/kernel/setup.c
index af838f6..0b53fde 100644
--- a/arch/x86_64/kernel/setup.c
+++ b/arch/x86_64/kernel/setup.c
@@ -617,6 +617,19 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
/* Family 10 doesn't support C states in MWAIT so don't use it */
if (c->x86 == 0x10 && !force_mwait)
clear_bit(X86_FEATURE_MWAIT, &c->x86_capability);
+
+ /* disable bios workaround for AMD Erratum 298 if necessary */
+ if ((c->x86 == 0x10) && (c->x86_model < 3) && (c->x86_mask != 3)) {
+ /* re-enable TLB caching if BIOS disabled it */
+ rdmsrl(MSR_K8_HWCR, value);
+ value &= ~(1UL << 3);
+ wrmsrl(MSR_K8_HWCR, value);
+ rdmsrl(0xC0011023, value);
+ value &= ~(1UL << 1);
+ wrmsrl(0xC0011023, value);
+ printk(KERN_INFO "AMD erratum 298 bios fix disabled\n");
+ }
+
}
static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
That particular MSR (C0010015) is the exact one deciding the errata patch and it'll work on all boards which have the patch to a certain extent. Changing 18 (patch) to 10 (disabled) will net you good benefits. It works on the MSI 790FX too and AOD "magic" button does exactly this, changing the bit values but performance is not like without the patch in the first place in many applications, which includes memory intensive work.![]()
C1001023 is 0 all the way for me and doesn't change anything by manipulating.![]()
LOL! I saw that and still skipped over it.
EAX [31:0] 0x00200020 is AOD button patch disabled and 0x00200022 is the patch enabled it seems.
I found a very cool program - RW-Everything:
http://jacky5488.myweb.hinet.net/download.html
Installed v0.28 and put the following batch file together. With the command line option in the link the batch file writes the 2x4 values to the msr automatically. This works on my ASUS M2A VM.
I did not understand the syntax of the rdmsr command and how to mask the bits of the eax register. So the batch file simply writes the values without reading and bitmasking them before.
file: TLB_fix_disable_CMD.rw
file: TLB-fix-disable.lnkCode:>cpu 1 >wrmsr 0xc0010015 0 0x01000010 >wrmsr 0xc0011023 0 0x00200020 >cpu 2 >wrmsr 0xc0010015 0 0x01000010 >wrmsr 0xc0011023 0 0x00200020 >cpu 3 >wrmsr 0xc0010015 0 0x01000010 >wrmsr 0xc0011023 0 0x00200020 >cpu 4 >wrmsr 0xc0010015 0 0x01000010 >wrmsr 0xc0011023 0 0x00200020 >rwexit
"Programme" is probably "program files" on your computer.Code:C:\Programme\RW-Everything\RW /Command=TLB_fix_disable_CMD.rw /Logfile=logfile.txt
This is close, nearly exactly the bandwidth I get without the patch applied you know, at 1200 5-5-5-15 when using a BIOS which gives you the option to disable patch through BIOS, even though your in single channel mode which is slower![]()
Only changing AOD button colors will then give me better bandwidth but performance still suffers greatly in most applications.
That said, I might as well go back to the older BIOSes with 800 RAM, at least they ran 3-3-3-3-11 1T, which is much quicker than 1200 5-5-5-15 2T and with those having the NB clocking/VID options, performance will improve.
I recieved the Crucical Balistic 8500 Tracers on thursday, did not yet test em because i'm still looking for the lowes possible voltages at given frequencies in steps of 2MHz ref HT. That takes longer than i expected.
Maybe we can run everest at the same settings for a board comparison.
You guys you can edit stuff with old tool WPCREDIT.EXE
And auto boot/set registers with WPCRSET
I havent rlly use/test that on winXp...
Was workin fine on win98
http://www.h-oda.com/
OK. Are you using a TLB patch enabled BIOS?
Choose some settings for me to run the tests at
I'll run the tests on a TLB patched BIOS, option "off", option "on" with different AOD buttons and then back to a BIOS without the patch option.
@justapost: Is it possible to set the TBL-Fix on all 4 cores using Crystal CPUID? If possible, how? Thanks in advance...![]()
Biostar T-Power I45 Motherboard
P45AA918 BIOS
E8600 450x9 1.35V
Danger Den Water Cooled
2x1Gig Super Talent PC6400 5-5-5-15
EVGA 7800GS
WD SATA 120GB
Rosewill 750W
Thanks! The mod BIOS I'm running has the ability to turn the fix on and off and it's applied to all 4 cores. Is the MSRC0011023 patch different then the TBL-Fix?
Biostar T-Power I45 Motherboard
P45AA918 BIOS
E8600 450x9 1.35V
Danger Den Water Cooled
2x1Gig Super Talent PC6400 5-5-5-15
EVGA 7800GS
WD SATA 120GB
Rosewill 750W
None of the settings really make a big difference until:
C0010015 is set for 8h and C0011023 is set for 2h at the same time. Then bandwidth drops a lot. Very close to the numbers you posted back a page or 2...
So the BIOS should set C0011023 to 2h when C0010015 is set to 8h. Is that correct?
It's really confusing. Thanks for your answers![]()
Biostar T-Power I45 Motherboard
P45AA918 BIOS
E8600 450x9 1.35V
Danger Den Water Cooled
2x1Gig Super Talent PC6400 5-5-5-15
EVGA 7800GS
WD SATA 120GB
Rosewill 750W
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