Official DFI LanParty UT X38-T2R(and LT) Discussion/Review/Overclock/Guide Thread

[t_ski]

Have one of those, too

[jakk]

Hi. I have oc'd before,but I have never had this good of a board to oc on. I am currently at 3.4 stable with my g0 q6600. I'm having a problem getting it to 3.6, and I was wondering if I could get some input as to what my problem might be. My first question is how everyone posts those nice bios templates,I'm not sure how to do that.
I currently have my cpu vtt set at 1.227v,I'm not sure what a safe limit is for it, and I sure don't want to fry my q6600! I'm running 2x1gb of patriot ddr800 at 2.23v. When my fsb is at 400,I can run ddr800 so I don't think ram is my problem,but I'm not sure. If I try to boot at 400,I bsod at windows loading. I'm guessing it's a voltage issue but,like I said,I don't want to fry anything. I'm on a d-tek fuzion and a pa 120.2 for temp control. Thanks for your help.

[Praz]

My first question is how everyone posts those nice bios templates,I'm not sure how to do that.

Just substitute your values.

[jakk]

Ok,here is what I am at. Everything marked 'stock' is board default.

CPU Feature Page
Thermal Management Control................Enabled
PPM (EIST) Mode...........................Disabled
Limit CPUID MaxVal........................Disabled
CIE Function..............................Auto
Execute Disable Bit.......................Enabled
Virtualization Technology.................Enabled
Core Multi-Processing.....................Enabled

Main BIOS Page
Exist Setup Shutdown......................Mode 2
Shutdown After AC Loss....................Enabled
O. C. Fail Retry Counter..................1
CLOCK VC0 Divider.........................Auto
CPU Clock Ratio...........................9x
CPU Clock.................................380 MHz
Boot Up Clock.............................265
DRAM Speed................................333/800
PCIE Clock................................100 MHz
PCIE Slot Config..........................1X 1X

CPU Spread Spectrum.......................Disabled
PCIE Spread Spectrum......................Disabled
SATA Spread Spectrum......................Disabled

Voltage Setting Page 
CPU VID Control...........................stock
CPU VID Special Add.......................Auto
DRAM Voltage Control......................2.230V
SB Core/CPU PLL Voltage...................1.510V
NB Core Voltage...........................1.265V
CPU VTT Voltage...........................1.222V
VCore Droop Control.......................Enabled
Clockgen Voltage Control..................3.45V
GTL+ Buffers Strength.....................Strong
Host Slew Rate............................Weak
GTL REF Voltage Control...................Disabled
CPU GTL 1/3 REF Volt......................N/A
CPU GTL 0/2 REF Volt......................N/A
North Bridge GTL REF Volt ................N/A

DRAM Timing Page
Enhance Data Transmitting.................Fast
Enhance Addressing........................Fast
T2 Dispatch...............................Enabled
Clock Setting Fine Delay..................Listed Below
CAS Latency Time (tCL)....................5
RAS# to CAS# Delay (tRCD).................5
RAS# Precharge (tRP)......................5
Precharge Delay (tRAS)....................12
All Precharge to Act......................auto
REF to ACT Delay (tRFC)...................auto
Performance Level.........................auto
Read Delay Phase Adjust...................Listed Below
MCH ODT Latency...........................auto
Write to PRE Delay (tWR)..................auto
Rank Write to Read (tWTR).................auto
ACT to ACT Delay (tRRD)...................auto
Read to Write Delay (tRDWR)...............auto
Ranks Write to Write (tWRWR)..............auto
Ranks Read to Read (tRDRD)................auto
Ranks Write to Read (tWRRD)...............auto
Read CAS# Precharge (tRTP)................auto
ALL PRE to Refresh........................auto

Read Delay Phase Adjust Page
Channel 1 Phase 0 Pull-In.................Enabled
Channel 1 Phase 1 Pull-In.................Enabled
Channel 1 Phase 2 Pull-In.................Enabled
Channel 1 Phase 3 Pull-In.................Enabled
Channel 1 Phase 4 Pull-In.................Enabled

Channel 2 Phase 0 Pull-In.................Enabled
Channel 2 Phase 1 Pull-In.................Auto
Channel 2 Phase 2 Pull-In.................Enabled
Channel 2 Phase 3 Pull-In.................Enabled
Channel 2 Phase 4 Pull-In.................Enabled

Clock Setting Fine Delay Page
Ch1 Clock Crossing Setting................stock
DIMM 1 Clock fine delay...................stock
DIMM 2 Clock fine delay...................stock
DIMM 1 Control fine delay.................stock
DIMM 2 Control fine delay.................stock
Ch 1 Command fine delay...................stock

Ch2 Clock Crossing Setting................stock
DIMM 3 Clock fine delay...................stock
DIMM 4 Clock fine delay...................stock
DIMM 3 Control fine delay.................stock
DIMM 4 Control fine delay.................stock
Ch 2 Command fine delay...................stock

Ch1Ch2 CommonClock Setting................stock

Ch1 RDCAS GNT-Chip Delay..................stock
Ch1 WRCAS GNT-Chip Delay..................stock
Ch1 Command to CS Delay...................stock

Ch2 RDCAS GNT-Chip Delay..................stock
Ch2 WRCAS GNT-Chip Delay..................stock
Ch2 Command to CS Delay...................stock