Stacked Asymmetric Mode
In this addressing mode addresses start in channel-0 and stay there until the end of
the highest rank in channel-0, and then addresses continue from the bottom of
channel-1 to the top.
This mode is used when both Channel-0 and Channel-1 DIMMs are populated in any
order with the total amount of memory in each channel being different
L-shaped Asymmetric Mode
In this addressing mode the lowest DRAM memory is mapped to dual channel
operation and the top most DRAM memory is mapped to single channel operation. In
this mode the system can run at one zone of dual channel mode and one zone of
single channel mode simultaneously across the whole memory array.
This mode is used when both Channel-0 and Channel-1 DIMMs are populated in any
order with the total amount of memory in each channel being different
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