With Phenom it will be possible,and it will give a new dimension on AMD OCing.Separate PLLs per core will make possible individual core OCing and separate power plane for IMC will make possible the higher freq. for IMC and L3 cache with independent VddNB adjustments.December can't come sooner enough
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.Separate PLLs per core will make possible individual core OCing and separate power plane for IMC will make possible the higher freq. for IMC and L3 cache with independent VddNB adjustments.December can't come sooner enough
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