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Thread: K10 Scores starting to surface

  1. #626
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    Well, I can't say I'm surprised, but damn, the K10 can't even match the C2D clock for clock, and it has a much lower clockspeed. It really looks like AMD just slapped an shared L3 cache on the K8 and called it a day. But if they did that, it should've came out a lot earlier. Well, hopefully it'll hit 3ghz by the time the desktop Phenom launches, otherwise AMD is ed. This is even worse situation than the R600, at least the HD2900XT was competitive.

  2. #627
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    Quote Originally Posted by xVeinx View Post
    Ok, so here is an interesting question. For AMD processors, what sort of changes or differences occur-if any-between the opteron and desktop series? I realize that there is different binning, etc, and memory controller differences, but anything else specifically?
    a.) coherent dual HT links for inter-processor communication (which has not realistically benchmarked)
    b.) n-way scaling (8xxx series)
    c.) RAS features including more pertinent/efficient binning processes

    i probably could keep talking about it, but why bother?

    dave
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  3. #628
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    Quote Originally Posted by AgentGOD View Post
    Looks like the previously leaked benchmarks were real.
    really? hmmm...i don't see that at all.

    Quote Originally Posted by awdrifter View Post
    Well, I can't say I'm surprised, but damn, the K10 can't even match the C2D clock for clock, and it has a much lower clockspeed. It really looks like AMD just slapped an shared L3 cache on the K8 and called it a day. But if they did that, it should've came out a lot earlier. Well, hopefully it'll hit 3ghz by the time the desktop Phenom launches, otherwise AMD is ed. This is even worse situation than the R600, at least the HD2900XT was competitive.
    *yawn*

    you DO realize that phenom will use DDR2-800, will launch at higher clock speeds, and will have better mainboard support at launch?

    comparing C2D to a server processor is like comparing a Humvee against a X5. On pavement, the X5 will "win." off road, the Humvee. Two different focuses with two different applications.

    calm down.

    dave
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  4. #629
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    Quote Originally Posted by dave_graham View Post
    a.) coherent dual HT links for inter-processor communication (which has not realistically benchmarked)
    b.) n-way scaling (8xxx series)
    c.) RAS features including more pertinent/efficient binning processes

    i probably could keep talking about it, but why bother?

    dave

    Well remmember what you say, i really dont believe K10 Phenom is going to be much faster than the server part (clock for clock).

  5. #630
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    Quote Originally Posted by dave_graham View Post
    really? hmmm...i don't see that at all.



    *yawn*

    you DO realize that phenom will use DDR2-800, will launch at higher clock speeds, and will have better mainboard support at launch?

    comparing C2D to a server processor is like comparing a Humvee against a X5. On pavement, the X5 will "win." off road, the Humvee. Two different focuses with two different applications.

    calm down.

    dave
    Actually Phenom will support 1066MHz DDR2 that was meant to be from the beginning but JEDEC didn't want to make a new standard with DDR3 so close.

  6. #631
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    Quote Originally Posted by metro.cl View Post
    Well remmember what you say, i really dont believe K10 Phenom is going to be much faster than the server part (clock for clock).
    i'll quote you back as well.

    Quote Originally Posted by metro.cl View Post
    Actually Phenom will support 1066MHz DDR2 that was meant to be from the beginning but JEDEC didn't want to make a new standard with DDR3 so close.
    DDR2-800 is still the base memory speed supported.

    what JEDEC chooses to do or not is not really up for conjecture here.

    dave
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  7. #632
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    Quote Originally Posted by Donnie27 View Post
    *Why was HwP disabled? Is there a problem with it or what?

    Because they received guidance from you know who ...


    There is one where disabling the HwP helps : SpecJBB.Other than that it is a major player in Core's performance.

    I'll give you something more to think about , the anbormally poor showing of Xeon in SpecJBB :

    Two flaws IMHO

    1) They used an old version of the Sun JVM, from before Sun adopted Intel HW. That old version contains optimizations for AMD but not for Intel. A more recent Sun JVM (1.6.0_02) or a recent version of JRockit would have resulted in much better Xeon scores. While they had a valid reason for going with 1.5.0_08 (be able to compare with old results) they should have mentioned this fact in the article.

    2) They worked around the main AMD weakness (poor performance if accessing non-local memory) by running with several JVM instances, each affinitized to a NUMA node. Xeon does benefit from multiple instances too, but not nearly as much as AMD does. For completeness, they should have run in a single-JVM config too, or without using numactl.
    http://www.realworldtech.com/forums/...82680&roomid=2

    Henrik Ståhl works as a product manager in the JRockit team, and has been with BEA since 2004.This guys definetly knows his stuff.

  8. #633
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    Quote Originally Posted by JohannesRS View Post
    It has around 14% for "K10 applications" on an opteron machine. What means, that you are locked to 666MHz ECC on memory.
    What it means is that the mobo only "officially" supports 667 DDR2. It doesn't mean that you can't run faster memory. I believe the "Phenom" test was done on a Supermicro board which are some of the most solid server boards on the market, but lack almost any overclocking features whatsoever.....

  9. #634
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    Quote Originally Posted by dave_graham View Post
    really? hmmm...i don't see that at all.



    *yawn*

    you DO realize that phenom will use DDR2-800, will launch at higher clock speeds, and will have better mainboard support at launch?

    comparing C2D to a server processor is like comparing a Humvee against a X5. On pavement, the X5 will "win." off road, the Humvee. Two different focuses with two different applications.

    calm down.

    dave
    I really doubt that extra 133mhz on the memory is going to help a lot, maybe 1-2% at most. And when the desktop Phenom launches, Intel will be close to launching the 45nm version of C2D, so the clockspeed gap is even bigger. I don't see how AMD is going to win this round.

    Just like the Hummer vs X5, most people will drive on paved roads most of the time (gaming) instead of off-roading (server stuff), so an X5 (C2D) is more suitable for most people than the Hummer (K10).
    Last edited by awdrifter; 09-10-2007 at 01:20 PM.

  10. #635
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    you just forgot that most people would by a X5...

    ...but it's the Hummer that will fullfill your pockets.

  11. #636
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    The big question is; how well will it overclock on air?

    Any K10 overclocking results out there?

  12. #637
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    last time: this is BARCELLONA, this is OPTERONS 2XXX AND 8XXX, this is for SERVERS AND HPC, and they NEVER OC!

    Unfortunatelly, of course!

  13. #638
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    Quote Originally Posted by awdrifter View Post
    I really doubt that extra 133mhz on the memory is going to help a lot, maybe 1-2% at most. And when the desktop Phenom launches, Intel will be close to launching the 45nm version of C2D, so the clockspeed gap is even bigger. I don't see how AMD is going to win this round.

    Just like the Hummer vs X5, most people will drive on paved roads most of the time (gaming) instead of off-roading (server stuff), so an X5 (C2D) is more suitable for most people than the Hummer (K10).

    The memory bandwith should help K10 a lot.
    Little L2 cache = Big bandwith dependance.

    Barcelona got 1mo L2 Per core (512X4+2)/4.

    Now compare any E2160 with E6600 at 333X9 and 333 ram, next try at same cpu freq but 666 ram or less. You'll see an hudge improvement for the E2160, and just a little for the E6600.

    AMD is just launching this young boy, improving the caches size and frequency is already programmed.
    I would like to see the barca with 4X2MoL2 and 8Mo L3 at start, but no ... no dreams yet
    Last edited by misteroadster; 09-10-2007 at 01:51 PM.
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  14. #639
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    Quote Originally Posted by JohannesRS View Post
    last time: this is BARCELLONA, this is OPTERONS 2XXX AND 8XXX, this is for SERVERS AND HPC, and they NEVER OC!

    Unfortunatelly, of course!
    I beg to differ Opterons are built on the best silicon AMD has to offer. It's not the cpu's themselves which aren't able to overclock, it's the mobos they're placed in and the restrictive reg.ecc. that's required of them. If you're able to run Opterons in an enthusiast mobo such as the Asus L1N64, performance should be just as good/if not better than any desktop part you'll ever get:



    Quote Originally Posted by misteroadster View Post
    The memory bandwith should help K10 a lot.
    Little L2 cache = Big bandwith dependance.

    Barcelona got 1mo L2 Per core (512X4+2)/4.

    Now compare any E2160 with E6600 at 333X9 and 333 ram, next try at same cpu freq but 666 ram or less. You'll see an hudge improvement for the E2160, and just a little for the E6600.

    AMD is just launching this young boy, improving the caches size and frequency is already programmed.
    I would like to see the barca with 4X2MoL2 and 8Mo L3 at start, but no ... no dreams yet
    L3 is a huge addition as it decreases the latency of the IMC with the memory

  15. #640
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    s7: yes, but you know that that is the exception on the rule. you are using a "highlander" (there must be only one) board for server chips, and not a server board. Ok, it works: sometimes, not always, and not, as far as I know, straightforward.

    I think that it would quite difficult to make a proper comparison of how well the desktops will oc even from this kind of combo. But, I bound for you: I WANNA see this results as soon as possible.

  16. #641
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    Quote Originally Posted by misteroadster View Post
    The memory bandwith should help K10 a lot.
    Little L2 cache = Big bandwith dependance.

    Barcelona got 1mo L2 Per core (512X4+2)/4.

    Now compare any E2160 with E6600 at 333X9 and 333 ram, next try at same cpu freq but 666 ram or less. You'll see an hudge improvement for the E2160, and just a little for the E6600.

    AMD is just launching this young boy, improving the caches size and frequency is already programmed.
    I would like to see the barca with 4X2MoL2 and 8Mo L3 at start, but no ... no dreams yet

    As I'm sure you remember from pioneering the gigabyte 939 board, memory and timming are very important. Seem to remember a few wr going to cpus running 200-300 mhz slower than the previous record, but with higher memory clocks. You can make up for a lot with a memory speed advantage.

  17. #642
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    Yep, AMD is not INTEL and vice et versa..

    If E2160 was high end, overclocking will be more funny with more memory importance.
    Last edited by misteroadster; 09-10-2007 at 02:55 PM.
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  18. #643
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    Quote Originally Posted by PhilDoc View Post
    As I'm sure you remember from pioneering the gigabyte 939 board, memory and timming are very important. Seem to remember a few wr going to cpus running 200-300 mhz slower than the previous record, but with higher memory clocks. You can make up for a lot with a memory speed advantage.
    i'm actually waiting for someone to develop a BIOS that allows the MC and Cores to be synchronous again.

    but that's just me.

    dave
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  19. #644
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    Quote Originally Posted by dave_graham View Post
    i'm actually waiting for someone to develop a BIOS that allows the MC and Cores to be synchronous again.

    but that's just me.

    dave

    I may be way off base, but I seem to remember that the core and the memory controller ran at two different speeds. If that's what you're refering to it would certainly help, but I assumed it was hard-wired and not something under bios control. If not let me know and I'll try and give you an intellegent comment, lol

  20. #645
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    Quote Originally Posted by PhilDoc View Post
    I may be way off base, but I seem to remember that the core and the memory controller ran at two different speeds. If that's what you're refering to it would certainly help, but I assumed it was hard-wired and not something under bios control. If not let me know and I'll try and give you an intellegent comment, lol
    they're 400mhz separated on a single power plane and 200mhz separated on a dual. *shrug*

    i want them clocked together.

    dave
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  21. #646
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    What happend to Informal ?
    Everything extra is bad!

  22. #647
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    Quote Originally Posted by Ubermann View Post
    What happend to Informal ?
    eh?

    dave
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  23. #648
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    Uberman,some of us have to work ,you know .Why you ask?

    I do have a few words to say and i must say i am really pleased with K10.It does very well in current platform,and does that at low frequencies and with a low power usage too(this is great news for those planing to swap RevF with K10).Also,i am a bit surprised about the "reviews"(both anand and tech report are sub standard ones-probably due to time issues) which used the B1,but i guess AMD knows what they are doing.BA is the launch stepping,so i expect the reviews with them hitting the net around the end of the month.
    AMD finally have quad core in the most needed sector and they have a really good and promising one.With clocks up to 2.6Ghz for server parts at the end of the year,there should be some really interesting reviews coming up(by that time,the whole platform/BIOS issue will be done with).

  24. #649
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  25. #650
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    Quote Originally Posted by informal View Post
    both anand and tech report are sub standard ones-probably due to time issues
    So the two reviews that show it not coming up to scratch are sub standard?

    As Dr Evil would say... riiiiight

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