MCH timings are loose as hell and the bandwidth simply runs out with four threads.
DDR3 with correct timings can easily run out DDR2 in bandwidth and latency.
Q6600 makes my head ache since it is both multiplier and FSB limited.
The board (P5K3) cannot run that FSB with 1:2 divider so either it is lower CPU frequency (equals lower FSB) or lower dram frequency. In this case lower dram frequency hurts much more.
With 3.8GHz clocks the time was 16:26 so the decreased memory bandwidth hurts like hell.




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