Question regarding TjMax, CoreTemp, Speedfan

[astaris]

About the Tjunction issue, The Coolest, author of Core temp, wrote:

Regarding the Tjunction... Well I wish I had a friend at Intel, heh. But I do have a friend who does, so he sends me some interesting bits of information, also I spoke to someone who decompiled TAT and found out that it was looking at the same MSR as I am and checking it for 85C or 100C.

Here the original post.

[Spanki]

About the Tjunction issue, The Coolest, author of Core temp, wrote:

Regarding the Tjunction... Well I wish I had a friend at Intel, heh. But I do have a friend who does, so he sends me some interesting bits of information, also I spoke to someone who decompiled TAT and found out that it was looking at the same MSR as I am and checking it for 85C or 100C.

Here the original post.

Interesting... and I also went and read his article on overclockers.com, but I think his quote above is misleading, as well as his article. He says that there is a MSR that can be read on Intel cpus to "checking it for 85C or 100C", but I don't think it's actually telling him the number value to use... because if it was, there wouldn't have been a problem with Allendale cpus between CoreTemp 0.94 and CoreTemp 0.95. In other words, he might be reading some MSR and based on the value he finds there (which is somehow relative to the cpu in use), he just picks one value or the other (either 85C or 100C, but both are 'hard-coded', not 'read' from the MSR).

Also note that he talks in terms of "this, or that" (one value, or the other), and not "read the Tjunction value from xxx MSR". Again, this leads me to believe that the prrgram only chooses between two values, which may or may not be correct (the behaivior was based on how TAT did things, but TAT was written for Mobile cpus and hasn't been updated).

And finally, in his various release notes, he talks about 'recognizing' or adjusting for new Intel cpus.... if it was all register-based, he could just read the values - no need to add new deciphering code.

[astaris]

...
Also note that he talks in terms of "this, or that" (one value, or the other), and not "read the Tjunction value from xxx MSR". Again, this leads me to believe that the prrgram only chooses between two values, which may or may not be correct (the behaivior was based on how TAT did things, but TAT was written for Mobile cpus and hasn't been updated).
....

I know, we atm are not able to find the Tjmax for these cpu's, but at least we know that there is a bit in an unknown MSR that tell us something about the Tjmax and that the Coolest has his sources...better than nothing

[unclewebb]

I know, we atm are not able to find the Tjmax for these cpu's, but at least we know that there is a bit in an unknown MSR that tell us something about the Tjmax and that the Coolest has his sources...better than nothing

That is absolutely WRONG!

There is a bit in the mobile processors that can be read which will tell you if TjMax is 85C or 100C but a representative from Intel has already publicly stated that reading that bit in desktop processors and jumping to a conclusion about TjMax is not valid.

Check the last reply before Intel closed this thread.
http://softwarecommunity.intel.com/i...howThread.aspx

"Use of bit 30 in MSR 0EEh is *not* valid for desktop, workstation or server processors based on the Intel(R) Core(TM) microarchitecture. However, for mobile processors, this assumption *is* valid. "

[astaris]

That is absolutely WRONG!

There is a bit in the mobile processors that can be read which will tell you if TjMax is 85C or 100C but a representative from Intel has already publicly stated that reading that bit in desktop processors and jumping to a conclusion about TjMax is not valid.

Check the last reply before Intel closed this thread.
http://softwarecommunity.intel.com/i...howThread.aspx

"Use of bit 30 in MSR 0EEh is *not* valid for desktop, workstation or server processors based on the Intel(R) Core(TM) microarchitecture. However, for mobile processors, this assumption *is* valid. "

Thanx for the link, really good information.
But on the same thread, we have:
question:

However, there is a problem. That reading although available in °C is _relative_ to the Tjunction which is CPU specific.
For some models it is 100°C for others it is 85°C

answer (by an Intel engineer):

It is true, some are calibrated to 100C, some are calibrated to 85C.
We should call that value as Tjmax for Conroe/Woodcrest/Clovertown instead of Tjunction.

Well, for what i know Conroe is not a mobile procesor...so we have 2 official versions in 2 pages of that thread.

[unclewebb]

The Intel rep Lexi S. went back and forth during that thread but the final paragraph contained his conclusion which I quoted previously:

"Use of bit 30 in MSR 0EEh is *not* valid for desktop, workstation or server processors based on the Intel(R) Core(TM) microarchitecture. However, for mobile processors, this assumption *is* valid. "

For the desktop processors, TjMax is 85C, 100C or ???C. It is not documented by Intel and there is no valid bit that software can read to determine what it is.

My personal opinion is that all Core 2 Duo desktop processors are exactly 85C. The mobile Core processors are all documented as 100C and I think the new revision G0 Q6600 is also 100C but as hard as I've looked, there isn't any official Intel documentation to back that opinion up.