DDR3 high speeds and high latencies

[Tony]

Guys

All I am seeing is you all moaning about 1000MHZ+ at 10-10-10 timings...if you knew how the latency works you would see thats actually quite fast.

I can't link to my site but we did an article showing how speed and CLS latency work and its not as bad as what you all think, in some cases its actually quite good.

Please go read and educate yourselves, there is no way you will see cas5 at 2000DDR but cas10 at 2000 may equal cas4 at 1200 so who cares

[Okda]

thanks for the heads up

it was described by a member in another thread

i can't imagine there is still someone complaining about latency

[Pt1t]

Guys

All I am seeing is you all moaning about 1000MHZ+ at 10-10-10 timings...if you knew how the latency works you would see thats actually quite fast.

I can't link to my site but we did an article showing how speed and CLS latency work and its not as bad as what you all think, in some cases its actually quite good.

Please go read and educate yourselves, there is no way you will see cas5 at 2000DDR but cas10 at 2000 may equal cas4 at 1200 so who cares

Remember we have not looked at the effects of TRCD and TRP yet, this is just the CAS latency but it gives you an idea of how speed scales with latency timing increases.

like that

[Okda]

thanks for posting the image pt1t

[Tony]

like that

Thats the one...I will extend ther graph to 1000MHZ and cas10 so you can see exactly how it works, but from this here you can see its not as bad as what you think.

[scwam]

Seems good to me. Kind of like DDR500 running 2.5/2.5/2.5/x. Below specs of my 3/3/2/8 DDR500 sticks.

[Rone]

To explain it in more detail:

1000MHz equals 1,000,000,000 Hz or clockticks per second.
This means one clocktick takes just a billionth of a second, or 1ns (nanosecond).

In case of DDR3 the CAS latency can be anywhere between 5 and 10, and determines the amount of clockticks it takes for the columnaddress-signal to complete.

Thus at 1000MHz, it takes 10ns with a CAS of 10 (10 × 1ns).
In terms of latency this is equal to CAS 5 at 500MHz (DDR2-1000), CAS 4 at 400MHz (DDR2-800), CAS 3 at 300MHz (DDR2-667), et cetera.

But the main thing people tend to forget is that, although the latency may be equal or sometimes higher, the total bandwidth is twice that of DDR2 and that's where the real benefit lies.

For example:

DDR2-1000 CAS 5
Latency: 10ns
Bandwidth: 8,000MB/s

DDR3-2000 CAS 10
Latency: 10ns
Bandwidth: 16,000MB/s

It's not all that bad.

[dinos22]

thanks Tony

i expected to see something roughly like that

it would be nice to see DDR3 hitting 1000 with CAS7 though.....one day maybe

[Pt1t]

thanks Tony

i expected to see something roughly like that

it would be nice to see DDR3 hitting 1000 with CAS7 though.....one day maybe

@ 2.5v

[largon]

Excellent!

Too bad all that bandwidth is pretty much useless.

[ownage]

Excellent!

Too bad all that bandwidth is pretty much useless.

I agree with that
Only usefull for high-end servers.

[Okda]

anandtech has a very good review comparing diff timings and speeds between ddr2 and ddr3

[superray]

Excellent!

Too bad all that bandwidth is pretty much useless.

Yeah, if the memory controller cannot take advantage of the high bandwidth, it becomes a total waste and the high latency becomes a problem.
Think about socket 939 and AM2, we all know 939 is faster than AM2 in many ways, becuase the memory controller of AM2 cannot make full use of the DDR2 bandwidth.

[Vassili]

To explain it in more detail:

So how do you calculate the ns off the Winbond BH-5 sticks that where running around 315MHz(630DDR) 2-2-2-5?

Seeing the graph, I think it is around 6ns right?

[kiwi]

Looking forward to SP 32M @ 2000+

[Rone]

So how do you calculate the ns off the Winbond BH-5 sticks that where running around 315MHz(630DDR) 2-2-2-5?

Seeing the graph, I think it is around 6ns right?

6.35ns to be exact, which is indeed an extremely low latency.
Applying that to DDR2 the same latency would be achieved using a setup like 472MHz CAS 3, 630MHz CAS 4, or 787MHz CAS 5.

[Tony]

All AM2 needs is 1 module around 1000 4-4-4 1T and you have all the bandwidth and low latency the CPU needs, its also a lot easier to tweak 1 module due to less load.

C2D is just the same really, shorter pipes and a need for fast access latency, so you may find running 1 DDR3 module is the fastest option as long as the speed is huge and the overall latency real low.

All we need is 1T implemented on DDR3 and we should be good to go with 1 module benching IMO

[EnJoY]

Tony, have you done any tests comparing single channel to dual channel? Is the extra overclockability/timing tightening ability with a single dimm enough to overshadow the greater bandwidth of dual channel?

[_damien_]

Yeah, if the memory controller cannot take advantage of the high bandwidth, it becomes a total waste and the high latency becomes a problem.
Think about socket 939 and AM2, we all know 939 is faster than AM2 in many ways, becuase the memory controller of AM2 cannot make full use of the DDR2 bandwidth.

Actually, I don't know that. Just because the CPU doesn't *need* it, doesn't make the excess bandwidth a drawback. On the contrary - high BW adds flexibility. One can drastically reduce the memory speed and aim at tighter timings instead, without compromising performance. That's especially relevant for AM2 systems, where there are huge clock gaps between the dividers. Furthermore, high bandwidth improves loaded latency as well, which is the only relevant type of latency.

All AM2 needs is 1 module around 1000 4-4-4 1T and you have all the bandwidth and low latency the CPU needs, its also a lot easier to tweak 1 module due to less load.

C2D is just the same really, shorter pipes and a need for fast access latency, so you may find running 1 DDR3 module is the fastest option as long as the speed is huge and the overall latency real low.

All we need is 1T implemented on DDR3 and we should be good to go with 1 module benching IMO

While I do agree that the performance would be perfectly adequate, every tiny gain makes a difference when benching, and having multiple banks will always be an advantage because it allows for latency hiding. So it would surprise me a lot if running one stick would prove to be the fastest option.

In fact, a page hit allows the memory to even skip certain operations, and the more banks, the fewer rows would be allocated per bank. Et cetera... (I assume you are well aware of this, even though the view expressed here suggests otherwise).

When K10 introduces channel interleaving later this year, there'll be another advantage to using multiple modules. The independent controllers will be able to perform concurrent reads and writes, in addition to yielding improved command efficiency. And channel interleaving will obviously require at least two modules.

BTW I seriously doubt that a CPU's memory preference would be dictated by its pipeline-depth.

[Roger_D25]

Great questions Enjoy I would also be interested in learning more!

[lordkelmain]

thanks Tony

i expected to see something roughly like that

it would be nice to see DDR3 hitting 1000 with CAS7 though.....one day maybe

Looks like they have: http://anandtech.com/memory/showdoc.aspx?i=2996

- lk

[dinos22]

Looks like they have: http://anandtech.com/memory/showdoc.aspx?i=2996

- lk

people are lazy these days (including me hahaha)

i scanned through to overclocking section and here is what Wes says

Overclocking

The highest overclock that could be reached with stability with Kingston DDR3-1375 was 1520 at 9-8-8-22 timings at 1.8V. While we managed to boot at speeds as high as 1552, the performance was not stable enough to consistently run our test suite. While voltages as high as 1.9V worked for a while with added memory fans, it did not remain stable. The highest stable voltage that worked long term with air cooling is 1.8V.

[saaya]

Guys
All I am seeing is you all moaning about 1000MHZ+ at 10-10-10 timings...

didnt you moan about it yourself?

1000mhz is 1ns, cas10x1ns = 10ns so this is about as fast as running Cas5 at 1000MHZ DDR.

Now if he was running Cas9 at 1000MHZ (2000DDR) i would have been impressed