!!!The Ultimate K8L Thread 2007 & Beyond!!!

[I)ickie]

It's Monday in Australia.. look forward to seeing some proper results.

[doompc]

Giuseppe said monday on the US...

[VulgarHandle]

Giuseppe said monday on the US...

he says monday, not which monday... and announcing dosn't mean lifting the NDA

this coming from someone who wants it to be tomorrow, btw

[oldblue]

Not sure if this has been asked yet............When Do The K10 Sneak/Preview NDAs Expire

http://www.syndrome-oc.net/articles....cle=94&lang=en
Sounds like Monday in the US

Hi guys. I hate to bring things down, but I really don't see where they say this. I wrote a post about this on another thread. I would be surprised if K10 NDAs expire tomorrow.

On the other hand, Hector will be speaking tomorrow. That might be interesting.

[Turtle 1]

Ya . Old blue I am waiting on Hectors little talk.

So far today only news is AMD will miss 1 qt. forecast . By a lot.

Been reading in the news section . About the issue of 1.5 billion shares of AMD up from 750 million shares. Some are talking like this is a 2for 1 splite.

It means no such thing. It only means the number of shares aMD can issue has been increased. A stock split now would be horriable for AMD. A reverse splite however may be agood idea tho.

Also read some of you think AMD will look attractive @ $10 a share .
That to would be foolish . As I said before I have a target price of $7 a share . But I am thinking of holding on until AMD reaches $3 a share which is very real probability of happening by Aug of 07.

The insiders of AMD stocks . HECTOR and friends are selling shares @ $14-15 like there is no tomorrow.

[Turtle 1]

Well for al those waiting for the server K10 parts. Don't hold your breath. Must be bad times at AMD. Amd has been putting out all kinds of bench mark hype . Yet it seems they don't have a cpu yet. Sept. for the release. I will say as I said before we will see Penryn befor we ever see a K10. I doubt K10 will be hear even in sept.
Heres a quote from todays conferance call .

Of course, AMD's quad-core processor came up briefly during an interview-style conversation on the Morgan Stanley stage and Ruiz provided some information bits, most of what was known before, such as the expectation that the chip would outperform its predecessors by about 30 to 40% and that AMD considers the introduction of the chip as a significant launch, probably more significant than the launch of the original Opteron CPU. When it came to likely availability, Ruiz said AMD is on track to sample the "Barcelona" server quad-core CPU and will be shipping in "late summer" - which is a more detailed timeframe than the "mid-2007" or "H2 2007" we had heard in the past.

Roadmaps seen by TG Daily so far indicated that AMD was aiming for an early Q3 (July) launch of Barcelona; Ruiz' now indicated that we are looking more at an August or even September introduction of the quad-core server processor. AMD representatives, however, reiterated in a conversation with TG Daily that the company has "not provided any guidance beyond that [AMD will] launch and ship at mid-year."



So the Spinners are hard at work . Saying K10 in 2nd qt. 07. april may not even clse to reality.

It was said on this forum that AEG is dead and gone but I don't believe it for a second. Aeg has been real busy putting out false numbers on K10 and its release date. From the above quote .

that the chip would outperform its predecessors by about 30 to 40% and that AMD considers the introduction of the chip as a significant launch

This means that the K10 will outperform K8 by 30 to 40% NOT C2D. . When its all said and done Penryn will likely be here before K10 and be a stronger performer.

[informal]

Some bla bla stuff..

Please stop spamming this thread.
Look at the news section and everything will be clear to you(i hope so).
AMD is referring to 2.66 Clowerton CPUs.
Get over it.

[Turtle 1]

Please stop spamming this thread.
Look at the news section and everything will be clear to you(i hope so).
AMD is referring to 2.66 Clowerton CPUs.
Get over it.

Informal I have not spammed a thread yet on purpose. Fact is its the AMD chaps doing the spamming. April may release of K10 server parts.Not even close. When I few of us qustioned it . We were gunned down by the true spammers. I said in that thread that when it doesn't happen all will say it was the inquirer that caused this rumor. Not true Its AMD doing damage control and out and out lying to the public. All the while hidden behind the only true guidence of k10 was the 2H release.

Funny how K10 demoed in Dec. Yet we won't see K10 till sept -oct . or later. You can't produce a chip that doesn't even exist.

You say I am spamming . I say I am only trying to keep some reality in these speculation threads. It would seem some members are out and out lying about K10 ES chips. IF AMD had K10 ready in dec. We wouldn't be waiting until sept or later for the release. Intel demoed C2D in March of last year. Yet they released ahead of time. Intel has moved 45 ahead and there is even bigger news but I will set on this one as its $$$$ in my pocket.

Spammer me not really . But if you would like I can go threw this thread and post the spam threads for you If you would like.

[Turtle 1]

quote informal

Please stop spamming this thread.
Look at the news section and everything will be clear to you(i hope so).
AMD is referring to 2.66 Clowerton CPUs.
Get over it

I have read it I seen nothing that says they are referring to C2D . Here is what was said today.

that the chip would outperform its predecessors by about 30 to 40% and that AMD considers the introduction of the chip as a significant launch

Clearly AMD is talking about K8 here as this is the predecessor of K10 not INTELS C2D.

I have been following the news section . I have to say I like serge 84's new name . He really cracks me up . Funny funny man.

[informal]

Yeah and Penryn will be 40% faster than Conroe and reach 4Ghz stock with Mitosis and so on and so on...(excerpt from your wild speculation posts in intel section about the die shrink of conroe)

Now seriously:EE Times article quotes H.Richard pretty clearly.Go read it.

And btw,you just spammed the topic by posting 2 posts in a row which could easily be one edited(not even going into non existence of contents of 2nd post..)

[i found nemo]

30 - 40% faster than current k8 is a lil faster than cd2

[Turtle 1]

Got a link to these so called benchmarks that we can all view . I want to see real benchmarks. Less than a month ago same people saying K10 here in april may . Now its been confirmed the end of summer maybe. The same people questioned these forcast also . So far the none believers are smoking the believers big time. I am willing to bet on the 20to 30% performance in benchmarks . This has to apply to allmost all benchmarks.

You name the stakes . Remember Intel has said bearlake brings a 10 to 15 % increase in C2D performance . You name the stakes . I will take the bet. Bearlake is going to be here way before K10. Fact is its looking like Penryn will beat K10 to the post

[Dresdenboy]

Some people here forgot, that having Barcelona ES in their hands or Barcelona dies on a wafer doesn't automatically allow AMD to sell the CPU to all 5 tier one OEMs, which are waiting for it to arrive. Being able to sell (!=giving ES away) means to have a good yield and enough wafer starts to fulfill expected demand.

Since it looks like AMD already has problems to fulfill demand (esp. of the channel, which comes after the OEMs) while having a CPU performing worse than Intel's offering - how would they fare selling a CPU which might be at least a bit better than Clovertown without having exaggerated price points?

BTW, something to complete the picture of the current situation for servers:
http://tweakers.net/reviews/674/1

[Dresdenboy]

I doubt a chipset can bring 15% more performance, something like that has never happened before, and probably won't happen now. I just don't see anything that could bring that kind of performance. Higher FSB could benefit quad core chips, higher mem bandwidth could also do the same thing, but by such margin.

http://www.hkepc.com/bbs/itnews.php?...me=0&endtime=0

Increasing memory bandwidth for QC has much more significant effects than it has for DC or even SC. Just think of FSB contention in tasks, which can't make efficient use of the caches thanks to huge datasets. I think, with optimized handling of mem accesses (maybe even with prefetching by the chipset itself), DDR3 and the higher FSB bandwidth you could see double digit improvements as they claim. Except maybe for Cinema4D and other apps/benches running nicely in the caches

[Shintai]

Well there is some "info" floating arround the forum, that K10 at 2.4 Ghz outperforms conroe @3.6 Ghz by 15-18% in a certain heavy calculation app

And AS FAR as I could understand AMD info, K10 will be up to 80% faster than K8
And that 40% lead in FP is over quad core xeon at 2.66 Ghz

I'd say K10 will be about 20-30% better than c2 on average, with some performance variations depending on the type of benches used

Whan we know so far is that K10 will have double the FP power of K8, also will bring atleast 20% more performance due to the new prefetchers, I dunno about the DRAM prefetcher but it should show some advantage in games IMO. There is also the L3 cache that will affect performance

Thus we do not have any hard numbers I'd day K10 has a very good chance to crush core2, at least in the apps I am interested in, rending, audio and video editing and processing.. After all that are the apps that make use of fast processors, I don't think it is that big to open word for 1 instead of 2 sec. Thats double difference but 1 sec is nothing. Now comparing to rending a scene 3 hours vs 6 hours per scene makes a big difference, having in mind you have to do like 20 scenes

Please...down to earth. Or you gonna be heavily dissapointed.

K10 wont have double the FP power. It will potentially have double the SSE power.
K8 already beat Intel with 20% or so in this "FP" benchmark of theirs. Also called specFP_rate. Please visit www.spec.org Its nothing more than a semi memory benchmark and PR spin.
And did you notice the QUADCORE K10 was 80% over a DUALCORE K8? Amazing aint it....

The more real information is that K10 is about 10% faster than Core 2 clock for clock with all enchancements.

[informal]

K10 wont have double the FP power.

The most obvious improvement is the second fpu pipe...Alongside the other mentioned in the huge list of improvements.

[arisythila]

Want to have 4 threads going? LOL

[arisythila]

Grarge.. We have to talk about K8L in this thread, and not wanting to go through 29 pages. lets just go back a few pages.

I remember AMD saying that the FPU power would be 3.2 times faster than K8's I'm not exactly sure how it got like that tho. They factored in that because it has 2 extra cores, and all the enhancements that the K10 has. I do remember them saying something about 3 complex FPU pipes I have to find that.

~Mike

EDIT: AMD said they do 4 instructions per cycle, over what K8 does 2 instructions per cycle.

[Shintai]

EDIT: AMD said they do 4 instructions per cycle, over what K8 does 2 instructions per cycle.

Uhm...thats nothing to do with any extra FPU. And its not any type of instruction either. They increased the SSE output from 2 double precision instructions to potentially 4. This affects SSE only and its only due to its being widen from 64bit to 128bit. Its like saying C2D got 6x more FPUs than CD

So...same amount of FPU units.

[arisythila]

Just saying what AMD said. LOL

~Mike

[Dresdenboy]

EDIT: AMD said they do 4 instructions per cycle, over what K8 does 2 instructions per cycle.

They surely said something like "4 DP operations per cycle", which you can achieve by using 2 SSE2 instructions per cycle. BTW these FLOP numbers usually only count arithmetical ops like addition/multiplication etc.

[Fred_Pohl]

The more real information is that K10 is about 10% faster than Core 2 clock for clock with all enchancements.

Given the actual core changes, that are well-documented at this time, that's a lot more believable than the 40% fanboy fantasies being opined by some.

They surely said something like "4 DP operations per cycle", which you can achieve by using 2 SSE2 instructions per cycle. BTW these FLOP numbers usually only count arithmetical ops like addition/multiplication etc.

Doesn't C2 already do 2 SSE2 instructions per cycle?

[savantu]

http://www.hkepc.com/bbs/itnews.php?...me=0&endtime=0

Increasing memory bandwidth for QC has much more significant effects than it has for DC or even SC. Just think of FSB contention in tasks, which can't make efficient use of the caches thanks to huge datasets. I think, with optimized handling of mem accesses (maybe even with prefetching by the chipset itself), DDR3 and the higher FSB bandwidth you could see double digit improvements as they claim. Except maybe for Cinema4D and other apps/benches running nicely in the caches

If you're the same guy who posts at Aces , you definetly sound more knowledgeable there.

[informal]

Brent i am seriously starting to doubt your knowledge of CPU architecture!
The 2nd FPU unit is CLEARLY visible on die shots of Barcelona!
http://www.chip-architect.com/news/K8L_floorplan.jpg

Next time get your facts str8 before you accuse someone of lack of knowledge.

[informal]

MY POINT WAS K8 ALREADY HAD 2 FPU UNITS!!!!!


MEANING THAT NO ADDITIONAL FPU UNITS WERE ADDED.

If you are so in "owning" mood ,please show me on the next picture the second FPU pipe at the revF(circle it in some photo app):

http://pc.watch.impress.co.jp/docs/2...2/kaigai_4.jpg



And please show it at this Brisbane die shot:
http://pc.watch.impress.co.jp/docs/2...gai267_03l.gif

Here's what Dirk M. said in the interview:

With the Hound core, 1 floating point arithmetic pipe is added to the side of the existing floating point arithmetic pipe already.