Regarding SLI/Sound read http://www.xtremesystems.org/forums/...5&postcount=18
Flashed to 402 bios
2x1GB G.Skill F2-6400PHU2 2GBHZ
Micron D9GMH 629 batch
Since everyone seems to be doing well with 402 beta bios, I decided to flash from 302 to 402 bios using Asus Ez Flash from within bios using my 4GB Corsair Voyager USB flash drive. Worked flawlessly. 402 bios brought 2 new bios memory timing options to the table, tRD and tRFC. tRFC can be seen in Memset v3.1v beta but tRD can't be seen in Memset right now.
Now using 2x1GB G.Skill F2-6400PHU2 2GBHZ Micron D9GMH 629 batch memory, I decided to play with the unlinked memory option finding my footing using the 5:9 divider below at stock 266FSB and 480mhz clocked memory
As always I used memtest86+ v1.65 to test the clocks before even booting into windows. I'd highly advise doing this all the time
AI Tuning: Manual
Nvidia GPU Ex: Disabled
LinkBoost: Disabled
FSB - Memory Clock Mode: Unlinked
x FSB - Memory Raio: N/A
FSB (QDR), Mhz: 1067 (means 266FSB)
Actual FSB (QDR), Mhz: 1067
MEM (DDR), Mhz: 960 (means 480mhz speeds)
Actual MEM (DDR), Mhz: 960
Vcore Voltage: 1.4v
Memory Voltage: 2.200v
1.2v HT Voltage: 1.4v
NB Core Voltage: 1.4v
SB Core Voltage: 1.50v
CPU VTT Voltage: 1.4v
DDRII Controller Ref Voltage: AUTO
DDRII Channel A Ref Voltage: AUTO
DDRII Channel B Ref Voltage: AUTO
tCL (CAS Latency): 4
tRCD: 4 then 3
tRP: 4 then 3
tRAS: 12 then 4
Command Per Clock (CMD): 2 clock (2T)
Advance Memory Settings
tRRD: AUTO
tRC: AUTO
tWR: AUTO
tWTR: AUTO
tREF: AUTO
tRD: AUTO < new in 402 bios
tRFC: AUTO < new in 402 bios
Async Latency: AUTO
CPU Spread Spectrum: Disabled
PCIE Spread Spectrum: Disabled
MCP PCIE Spread Spectrum: Disabled
SATA Spread Spectrum: Disabled
LDT Spread Spectrum: Disabled
CPU Internal Thermal Control: Disabled
Limit CPUID MaxVal: Disabled
Enhanced C1 (C1E): Disabled
Execute Disable Bit: Disabled
Virtualization Technology: Disabled
Enhanced Intel Speedstep Tech: Disabled
LDT Frequency: 5x
PCIEX16_1 Frequency (Mhz): 100
PCIEX16_2 Frequency (Mhz): 100
PCIEX16_3 Frequency (Mhz): 100
SPP<->MCP Ref Clock, Mhz: 200E6600@2400Mhz 9x266FSB 480Mhz 4-4-4-12 2T at 2.2v
Advance Memory Settings
The advance memory settings set as AUTO in bios @5:9 unlinked 480mhz memory clocks showed up in Memset v3.1 beta in windows as:
tRRD: AUTO = 3
tRC: AUTO = 26
tWR: AUTO = 6
tWTR: AUTO = 8
tREF: AUTO = ??
tRD: AUTO = ??
tRFC: AUTO = 37
Async Latency: ??
I then ran Super Pi 32M but tightened the timings using Memset v3.1 beta to the following:
tRRD: 3
tRC: 26 tightened to 7
tWR: 6 tightened to 5
tWTR: 8 tightened to 7
tRFC: 37 tightened to 18
Managed 32M time of 20m 24.640s at E6600@2400Mhz 9x266FSB 480Mhz 4-4-4-12 2T at 2.2v
E6600@2400Mhz 9x266FSB 480Mhz 4-3-3-4 2T at 2.2v
Then I tightened both the main and advance timings even more in same windows session and ran Super Pi 32M with the following:
tCL (CAS Latency): 4
tRCD: 4 tightened to 3
tRP: 4 tightened to 3
tRAS: 12 tightened to 4
Command Per Clock (CMD): 2 clock (2T)
tRRD: 3
tRC: 7 tightened to 5
tWR: 5
tWTR: 7
tRFC: 18
Managed 32M time of 20m 16.891s at E6600@2400Mhz 9x266FSB 480Mhz 4-3-3-4 2T at 2.2v
Still have alot of tweaking to do. The unlinked memory mode isn't as flexible as I thought it would be - basically unlinked mode gives you more sets of fixed dividers than the linked mode, so you only have set options for each FSB you set. An example just to name a few memory options you have in unlinked mode for 266FSB (1067 QDR) are:
Memory clocks in unlinked mode:
- 915 actual 914.3Mhz
- 934 actual 933.4Mhz
- 949 actual 948.1Mhz
- 960 actual 960Mhz
- 978 actual 977.8Mhz
- 991 actual 990.5Mhz
- 1000 actual 1000Mhz
- 1067 actual 1066.7Mhz
Those are just a few of the examples there's many more.
- So if you typed in 960, you'll get 960 = 480Mhz memory clocks.
- If you typed in 970, you'll still get 960 = 480Mhz memory clocks.
- If you typed in 985, you'll get 977.8Mhz = 488.9Mhz memory clocks.








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