K8l to have 6mb cache

[Turtle 1]

http://www.theinquirer.net/default.aspx?article=36003.

[3NZ0]

AMD's Altair FX is a 6MB SOI 65 nanometre thingie

How unprofessional.

i really do wonder how this look against the competition.

from past experience, cache increases don't make a cpu go from fast to insane, so im not holding out for a godly cpu due to a cache bump.

[[XC] Teroedni]

Turtle 1 can you please stop posting from theInquirer please, and rather look around for some trusted sources like others do!

[theteamaqua]

It will work at 2.7 to 2.9GHz and will end up with 2MB of dedicated L2 cache memory and an additional 2MB of shared L3 cache memory. When we say dedicated, it means that each CPU has 2 MB of L2 memory, total of 4MB of L2 memory plus 2MB of shared L3

each CPU has 2MB, and total 4MB, so that means 2 CPU, and i assume by using the word "CPU" hes talking about cores.. Altaire is dual core?? i thought its quad core??

[Turtle 1]

Turtle 1 can you please stop posting from theInquirer please, and rather look around for some trusted sources like others do!

Like the Vr-zone no doubt.

[Nedjo]

I think that Fudo has misunderstood something!
First he wrote:
“We managed to dig out a few more details about the real Quad core codenamed Altair FX”
So it’s a QC, he’s talking about!
Then he goes:
“When we say dedicated, it means that each CPU has 2 MB of L2 memory, total of 4MB of L2 memory plus 2MB of shared L3.”

So, with his math each core has 2 megs of L2! Four times of 2MB is 8MB+2MB of L2 equal 10 MB!!

[[XC] Teroedni]

Yeah Is The Inquirer at it best
And when it comes to Fudo
After all his Ati talks



And Turtle 1
Everything is better than the Inquirer

[theteamaqua]

I think that Fudo has misunderstood something!
First he wrote:
“We managed to dig out a few more details about the real Quad core codenamed Altair FX”
So it’s a QC, he’s talking about!
Then he goes:
“When we say dedicated, it means that each CPU has 2 MB of L2 memory, total of 4MB of L2 memory plus 2MB of shared L3.”

So, with his math each core has 2 megs of L2! Four times of 2MB is 8MB+2MB of L2 equal 10 MB!!

tahts what i said in post #4 ....

according to him if "CPU" means "Cores" then yes K8L or the Altaire only has 2 cores ... i am guessing inquirer is bsing again

[Turtle 1]

each CPU has 2MB, and total 4MB, so that means 2 CPU, and i assume by using the word "CPU" hes talking about cores.. Altaire is dual core?? i thought its quad core??

Ya I thought it was quad core also . he says it is in the link. so 1 cpu would have 8 mb of cache L2 and 2mb of L3 shared cache. I am having a hard time figuring out what the reporter is reporting


I think its L2 cache 2mb 4x2=8mb not shared.

L3 cache 512 4x512 = 2mb shared cache. I thought it was 4mb of shared L3 cache

[Dimitriman]

I think he doesn't know what he is talking about and its what AMD has been saying it would be all along, each core with 1MB L2 (so 4MB total unshared), then All 4 share a 2MB L3.
Get a grip INQ.

[informal]

Each core has 512KB of L2 (dedicated) and all 4 cores share the 2MBs of L3 cache.So Fudo mixed some things up(again...).
Also,each core has ( presumably ) 64KB L1D and 64KB L1I cache, although i have seen reports of 32+32 KB combination.
And need I say cache is only ONE of the arch. changes coming with the New Core.As some AMD exec already said :"There is no part of the chip that was left untouched".
So i believe we'll see some significant IPC advances with the new core.

And yes,the L3 cache size is subject to changes since AMD wants to differentiate it's offerings more with the coming New Core Gen.

[Dimitriman]

Yeah my bad, it was 512kb
perhaps then what the INQ is trying to say is that they will make each core 1MB???

[informal]

I don't think it's impossible that AMD may produce the variant of the QC part with 1MB dedicated L2 per core,but i think they evalueted pros and cons and are aiming for the best perf./$ option.Maybe for the server market ,highest number part will have larger L2.
With new IMC and high speed DDR2 next year,i think the New Core will do great against intel York/Wolf variants(i really believe c2d wouldn't be a match for it-for Dual Core part that is;Kents will have a hard time too since the shared FSB)

[WeStSiDePLaYa]

remember amd not contracts out some of their chips.

and i think it is 6mb total.

1mb per core L2, 2mbL3 shared.

[onewingedangel]

If it does have 6MB cache, my moneys on 4x512k L2 + 4M L3.

Having total l3 equal total l2 would be bad enough, but having more l2 than l3 would be retarded (I know AMD's cache scheme is not inclusive, but the speeds are still tiered - so more 'faster' L2 would be prefered, so 4x1m l2 would be better than 4x512 + 2mb l3 where all cores are in use (if a single core uses all l3 then obviously that may be different).

However, if amd are using the l3 just to store the data that would be worked on by multiple cores, so each l2 stores the data that the core works on, and the l3 is used to ease intercore communication - not boost single core performance, then 4x1m + 2m l3 would be the better option - even though the 'shared cache' wouldn't boost performance when only one core is in use.

[informal]

CharlieD has a new rant about intel and he basicaly said that Yorktown(or yorkfield) was just a rumour and no native quad core till nehalem.
So we will have AMD's New Core pitted against the just die shrinked Conroe with some new SSE additions and lower TDP from 65W to 50W (from Charlie's source).
Now without native QC and CSI ,intel seems in a bit of a trouble for late 07 early 08 since they would have "only" shrinked Conroes with SSE4 on the 1333MHz FSB.For the 4 core chip,it could be a bottleneck(we know that 1066 is).

There are a few things that you won't see this time around, real quad cores and higher FSBs. The Yorktown rumours that were flying around at IDF were and are wrong, there is no converged quad core parts until Nehalem. There are also no plans for a 1600FSB unless something bad happens to Nehalem/CSI, or AMD pressures Intel hard.

[onewingedangel]

intels 45nm chips will also be clocked higher. Current 65nm chips could easily be released at faster speeds, so even if 45nm only yields a minor increase in clocks a yorkfied at 3.6-4 ghz should still dominate k8l in most applications.

Remember AMD will have scaling issues as well - they'll have 4 cpus on a dual channel memory controller, and whilst the bottleneck will nock be as significant as intels fsb bottleneck, it will come into play in application that are heavily multithreaded and crave bandwidth. In addition we have no idea on how K8L's IPC will compare to core2, and k8l will not have equal clocks to match intels 65nm chips, let alone their 45nm ones.

I would suspect k8l will be a very nice multi socket server chip, but on the desktop I see intel maintaining their lead.

[onewingedangel]

intels 45nm chips will also be clocked higher. Current 65nm chips could easily be released at faster speeds, so even if 45nm only yields a minor increase in clocks a yorkfied at 3.6-4 ghz should still dominate k8l in most applications.

Remember AMD will have scaling issues as well - they'll have 4 cpus on a dual channel memory controller, and whilst the bottleneck will nock be as significant as intels fsb bottleneck, it will come into play in application that are heavily multithreaded and crave bandwidth. In addition we have no idea on how K8L's IPC will compare to core2, and k8l will not have equal clocks to match intels 65nm chips, let alone their 45nm ones.

I would suspect k8l will be a very nice multi socket server chip, but on the desktop I see intel maintaining their lead.

[informal]

Read again what i said.There seems to be no Yorkfield at all for 07(or in other words,no native QC chip till nehalem).
And how do you know AMD couldn't clock higher their Desktop variant of the New Core then "officialy stated in roadmaps" ??
By the H2 07' one should expect mature & additionaly tweaked 65nm process and higher clock speeds!That combined with new separate voltage management for IMC and the cores should bring much easier OCing then with K8s,bringing the maximum out of the new chips.

[onewingedangel]

Yorkfield is on target - its the 45nm equivilent of kentsfield, a dual die MCM. The original roadmap and rumours claimed this, it was only recent speculation that there was going to be a 'native' quad core core 2 processor - which was just speculation.

If AMD's h2 2007 part were to outperform kentsfield, which will be clocked at 3ghz in the new year (333x9), and can already clock far higher they will have to either have higher IPC (very possible), or be clocked higher (doubtful). To outperform a higher clocked 45nm part they would have to have higher IPC and similar clock or significantly higher IPC and lower clock. All suggestions point to AMD having a significantly lower clock, but theres no indications on IPC. Judging by all indications given so far, it looks like k8l will perform clock for clock similar to core2 - but will be clocked slower - hence yorksfield will likely outperform K8L.

[LowRun]

Ya I thought it was quad core also . he says it is in the link. so 1 cpu would have 8 mb of cache L2 and 2mb of L3 shared cache. I am having a hard time figuring out what the reporter is reporting


I think its L2 cache 2mb 4x2=8mb not shared.

L3 cache 512 4x512 = 2mb shared cache. I thought it was 4mb of shared L3 cache

It didn't prevent you from posting it as news and funny you only thought of it after theteamaqua pointed it out

[VulgarHandle]

wait, as has been stated many times before, AMD's quad-cores will have 512kb L2 each core, plus 2mb shared L3, making 3mb cache, and being FX, that means 2 cpu's, for a total of 6mb

[VulgarHandle]

oops, first post upon waking up, math went out the window....lol

1mb per core would be neat tho

[breakfromyou]

read the AMD tech docs. 512kb of L2 cache per core, 4mb of L3.

[VulgarHandle]

read the AMD tech docs. 512kb of L2 cache per core, 4mb of L3.

that makes sense, if the dual-cores are gonna have 2mb shared L3, then the quads should have 4mb...of course, 4x1mb L2 + 4mb L3 would be fantastic....for that extra 1-3% performance gain, lol