Countdown for E4 Venice..the return of the OC king

[HolyAk]

AMD will stop production on E3 Venice ...3000+3200+3500+...but i dun really care about this coz they gonna roll out the E4 stepping venice which is cut-down version of Opteron/sandiego...so wat do u think about the overclockablity??

but juz wonder wheter AMD already start to ship it ?? cant wait to see the result...already push my local amd dealer to get it as soon as posible :P

[DTU_XaVier]

Well, the good batches are probably going to be hitting 2.9-3.1GHz on a very good air cooler , with the cut-down cache and all...
And they'll probably be running a bit cooler than their 1mb cache-counterpart...
But genrally I think the same steppings are gonna be good as before, though they'll probably tape out a lot of new cores now...

Best Regards

[HolyAk]

aiming for the early batch steppnig of opteron ... CABNE 0530 such....

[trans am]

Isn't AMD making 940 pin A64's soon with DDR2 support? when is this going to happen?

[Jochenp]

Wasn't that going to be socket A2?

[5days]

Socket M2.

[dimasdw]

Just Info the code will be "CG" for E4 Revisions

from anandtech

The new E4 chips carry the "CG" code name in the SKU. For example, the new 3200+ retail kit is labeled as ADA3200CGBOX. Don't let this confuse you with the "CG" stepping of older Hammer SKUs; those were labeled as "AR" and "AS" in the OPN (SKU).

[HolyAk]

Click look here

[metro.cl]

what if this are bad sd cores??

[zir_blazer]

Absolutely nothing new here. These new Processors are AMD way of getting rid of Manchesters (And in a few weeks, Toledos should come too) that got a defective Core but with the other one working flawlessly. With the size of those Cores, is quite probable that they getted a lot of them with a damaged Core.
s7e9h3n already did a Thread some time ago saying that he getted two Processors with the OPNs ADA3700DKA5CF and ADA4000DKA5CF that in a Screenshot of Central Brain Identifier are identified as Revision JH-E6, exactly the same that Toledos. Avoid to confuse them with a Venice or Palermo Rev. E6 because the full Revision name of those Cores is DH-E6. Check here. So, the new ones with OPNs ADA3200DKA4CG and ADA3500DKA4CG are nothing more that Manchester (Revision BH-E4). Everything fits properly if you include the full Revision name
What about overclocking? They will run amazingly cool because they got twice the Core surface to dissipate heat while consuming only what a Single Core Processor because the other Core will be disabled. Like with Thortons (Bartons with half of its Cache L2 disabled), running cooler due to a bigger Core surface while using the same amount of Transistors that a Thoroughbred should allow them to overclock a bit more than a physically Single Core Venice or San Diego.

[Nocturnal]

I can't wait, heard about this from Kris from Anandtech himself and was very excited to hear this big announcement.

[ozzimark]

What about overclocking? They will run amazingly cool because they got twice the Core surface to dissipate heat while consuming only what a Single Core Processor because the other Core will be disabled.

but only part of that core is really putting out heat

[HolyAk]

if these REV venice is actually base on manchester E4 ...well..cross my finger to wait news from athlon64 unlock thread... it might be able to open tat defect sec core as well..could be working on slower speed only...

2 hope on these stepping,better overclocking or could be unlock !!?? :P

[shimmishim]

http://labs.anandtech.com/alllinks.php?pfilter=4105

for availability of the new CG rev 3200+ venice

[zir_blazer]

but only part of that core is really putting out heat

And what I sayed?

[Piotrsama]

And what I sayed?

This:

They will run amazingly cool because they got twice the Core surface to dissipate heat

And he correctly pointed that as only one core will be working, heat will come of only that part of the core.

[zir_blazer]

This:

And he correctly pointed that as only one core will be working, heat will come of only that part of the core.

They will run amazingly cool because they got twice the Core surface to dissipate heat while consuming only what a Single Core Processor because the other Core will be disabled

That exactly what I sayed...

[Piotrsama]

So what?
Heat is produced only in half of the die

[HolyAk]

So what?
Heat is produced only in half of the die

yup,but better connecting between the core and IHS mean heat will more easily to transfer out ..due to large die(large surface contact to the IHS)

[s7e9h3n]

yup,but better connecting between the core and IHS mean heat will more easily to transfer out ..due to large die(large surface contact to the IHS)

Don't forget that they also run @ a lower default vcore. Here's a couple of tests on air with the ADA4000DKA5CF:

Idle Default:

Loaded default:


Idle @ 2800:

Loaded @ 2800:

[Piotrsama]

Don't forget that they also run @ a lower default vcore.

Can't argue with that

yup,but better connecting between the core and IHS mean heat will more easily to transfer out ..due to large die(large surface contact to the IHS)

Now, you have to prove that heat will be distributed equally along the entire die (which won't happen ).
That's the point, it won't be dispersed equally in the whole die, it will be concentrated in the used core, and the other area will be "warm" (much cooler). The heat physically goes "up", to the cooler, not sideways. (I remember reading an article about heat disippation, can't find it).


Anyways, until a Physician tell us the opposite ( ), I will mantain my opinion.
I might be wrong, anyways.

[LowRun]

Super Pi 1 M is far from ideal to evaluate the heat output.

[HolyAk]

lol....basicly it will help abit will larger core ... not much maybe but better than nth

[HolyAk]

guess need to wait a quite long time b4 it reach malaysia...US shud get within next month...haihz

[s7e9h3n]

Super Pi 1 M is far from ideal to evaluate the heat output.

FWIW, the cpu topped out @ ~38C loaded on 32m (I'll have to look for the pic of it running). Here's the finished run: