here we have it folks 266mhz 2-2-2-6 1T 3.6v

10x 266mhz 2-2-2-6 1T 3.6v
chipset = 1.7v
LDT = 1.4v
LDT 3x

1.525 + 10% = 1.6-1.62v

CPC = Enabled
CAS Latency(CL) = 2
RAS to CAS(Trcd) = 2
Min RAS# Active time(Tras) = 6
Row Precharge Time(Trp) = 2
Row Cycle Time(Trc) = 8
Row Refresh Cycle Time(Trfc) = 15
Row to Row Delay(Trrd) = 2
Write Recovery Time(Twr) = 2
Write to Read Delay(Twtr) = 1
Read to Write Delay(Trwt) = 2
Refresh Period (Tref) = 3120
Write CAS Latency(Twcl) = Auto
DRAM Bank Interleave = Disabled
Skew = Increase
Skew Value = 255
DRAM Drive Strength = Level 7
DRAM Data Drive Strength = Level 4
Max Async Latency = 7ns
Read Preamble Time = Auto
Idle Cycle Limit = Auto
Dynamic Counter = Auto
R/W Queue Bypass = 8x
Bypass Max = 4x
32 byte Granularity = Disable(8burst)

@266mhz 2-2-2-6 1T 8-15-2212