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Thread: AMD Cayman info (or rumor)

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  1. #10
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    Quote Originally Posted by DilTech View Post
    You forgot one minor tid-bit... The slower GDDR5 generally has tighter timings. As such, with both at the same bandwidth over-all the wider-bus will generally end up the faster, albeit by what amount this effects things remains to be seen.
    Sigh.

    What do tighter timings help when the cycle delay is lower? They don't. Just as there is no replacement for displacement in engines, there is no replacement for raw bandwidth.

    Look at the timings from DDR1 era and compare them to DDR3 era. And see how the performance has been increasing. The only difference between e.g. 166 MHz DDR1 CAS 2 and 667 MHz DDR3 CAS 8 is that the latter gives quadruple the bandwidth. The CAS latency is exactly the same. It has been near the same for a decade, though there has been some progress, it's far from the progress in bandwidth.

    Obviously in situations where there are just small few byte memory accesses and the limiting factor is the latency, the difference between such DDR1 and DDR3 is slim. But when doing tons of memory operations the difference is tremendous. Given GPU <-> VRAM bandwidth(What, ~180 GB/s these days?), the limiting factor most of the time is the bandwidth, not the latency.
    Last edited by Calmatory; 12-10-2010 at 04:06 AM.

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