some news to future E8400/E8500 or E3110
New stepping E-0 C2D are already sampling, and will be out sometime August.


Quote Originally Posted by Intel Documentation dated 22/5/08

Description of Change to the Customer:
The Intel® Core™2 Duo Processor E8500, E8400 and Dual-Core Intel® Xeon® Processor E3110 will
undergo the following changes for the C-0 to E-0 stepping conversion:
• New SSpec and MM numbers for the converting products
• CPUID will change from 0x10676 to 0x1067A
• Power Status Indicator (PSI) is supported
• PECI implementation change
• New instructions added – XSAVE/XRSTOR
o New ISA extension for save/restoring context of x87, SSE, and future processor state
• New feature added - ACNT2
o Improved mechanism for determining processor utilization. To be used for more efficient
P-state determination.
• Package change to Halide free package


Customer Impact of Change and Recommended Action:
• No BIOS or board changes required for ACNT2 feature. The operating system (if it supports this
feature) will check the feature flag and enable this feature.
• No Bios changes required for XSAVE/XRSTOR. Refer to Intel® 64 and IA-32 Architectures
Software Developer’s Manual Volume 3A: System Programming Guide and Intel® Advanced
Vector Extensions Programming Reference for details.
• Power state Indicator (PSI) will require new circuits on the board to support the feature. Please
refer to the Platform Design guide document for chipset that support the PSI feature.